Vijay Maheshwari

US Patent:

20020138804, Sep 26, 2002

Filed:

Jan 25, 2001

Appl. No.:

09/771020

Inventors:

Onkar Sangha - San Jose CA, US
Vijay Maheshwari - Fremont CA, US

International Classification:

H03M013/00
G06F011/10
G11C029/00

US Classification:

714/758000, 714/807000

Abstract:

In order to speed up software computation of CRC, scrambler, descrambler, or other functions used to enhance reliability of data transmission, a software instruction is provided which performs a partial or complete computation of the function. A register may be provided to store a value identifying the function to be computed if multiple functions can be computed in a particular embodiment. A register can also be provided to store the number of bits on which a computation invoked by the software instruction is to be performed. Bit ordering (for example, big endian or little endian) can also be specified by a value or values stored in a register.

US Patent:

20020176430, Nov 28, 2002

Filed:

Jan 25, 2001

Appl. No.:

09/770937

Inventors:

Onkar Sangha - San Jose CA, US
Ed Kwon - Fremont CA, US
Vijay Maheshwari - Fremont CA, US
Akihiro Kuichi - Saratoga CA, US

International Classification:

H04L012/56

US Classification:

370/412000, 370/395700

Abstract:

Methods and systems for managing data packets in various communication networks are provided. The system includes a first memory for storing at least a free data pointer and a buffer descriptor. The free data pointer points to a data buffer allocated in a second memory. The buffer descriptor includes at least a data pointer pointing to a data buffer configured to store one or a portion of the communication packet. The first memory has a maximum threshold such that if the number of buffer descriptors stored in the first memory reaches the maximum threshold one or more buffer descriptors stored in the first memory are transferred to the second memory.

US Patent:

58836799, Mar 16, 1999

Filed:

Feb 20, 1997

Appl. No.:

8/803287

Inventors:

Moenes Z. Iskarous - Sunnyvale CA
Vijay Maheshwari - Fremont CA
Srinivasa R. Malladi - San Jose CA

Assignee:

C-Cube Microsystems, Inc. - Milpitas CA

International Classification:

H04N 5907

US Classification:

348699

Abstract:

A method of retrieving image information is disclosed in which a reference block is selected which overlies three sections of an image stored in a memory having two banks. Exactly two of the sections of the image are stored in the same bank of the memory. A sequence in which to read the three sections is selected such that the two sections in the same bank are not read consecutively. Each section of the image underlying the reference block is read in the selected sequence to retrieve the image information.

US Patent:

6130963, Oct 10, 2000

Filed:

Nov 22, 1996

Appl. No.:

8/755445

Inventors:

K. Metin Uz - Los Altos CA
Vijay Maheshwari - Fremont CA

Assignee:

C-Cube Semiconductor II, Inc. - Milpitas CA

International Classification:

G06K 936
G06K 946

US Classification:

382233

Abstract:

A method and apparatus for memory-efficient decoding of frame chroma of progressive frames. During the display of a first field of the frame, lines of interpolated chroma values are calculated for both even and odd field lines. The lines of interpolated values for the first field are generated by applying a two-tap filter with coefficients (1/4, 3/4) to corresponding lines of chroma samples, and the lines of interpolated values for the second field are generated by applying a two-tap filter with coefficients (3/4, 1/4) to the corresponding lines of chroma samples. The lines of first field interpolated values are displayed with the first field, while a given even line of second field interpolated values is written to memory locations occupied by a line of chroma samples used to generate the given line. The other line of chroma samples used to generate the given line of second field interpolated values is allowed to be overwritten with additional progressive frame data, such that one line of decoder memory is freed up for each pair of displayed lines. This permits the frame chroma decoding process to be performed utilizing a total memory capacity of only 2.