Wan Ni

US Patent:

8640077, Jan 28, 2014

Filed:

Jul 30, 2012

Appl. No.:

13/561760

Inventors:

Robert A. Groves - Highland NY, US
Wan Ni - San Jose CA, US
Stephen A. St. Onge - Colchester VT, US
Jiansheng Xu - Essex Junction VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/50
G06F 11/22
G06F 9/455

US Classification:

716136, 716100, 716106

Abstract:

Systems and methods are provided for capturing mutual coupling effects between an integrated circuit chip and chip package using electronic design automation (EDA) tools. Specifically, a method is provided that is implemented in a computer infrastructure for designing an integrated circuit chip. The method includes compiling process technology parameters that describe electrical behavior for a chip-package coupling and a package of the integrated circuit chip. The method also includes generating a parasitic technology file to include the compiled process technology parameters.

US Patent:

20100237472, Sep 23, 2010

Filed:

Dec 10, 2009

Appl. No.:

12/634726

Inventors:

John D. Gillis - Floridale FL, US
Wan Ni - Carlsbad CA, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 23/48
H01L 21/768

US Classification:

257621, 438618, 257E23011, 257E21597

Abstract:

At least one through-substrate via is formed around the periphery of a semiconductor chip or a semiconductor chiplet included in a semiconductor chip. The at least one through-substrate via may be a single through-substrate via that laterally surrounds the semiconductor chip or the semiconductor chiplet, or may comprise a plurality of through-substrate vias that surrounds the periphery with at least one gap among the through-substrate vias. A stack of back-end-of-line (BEOL) metal structures that laterally surrounds the semiconductor chip or the semiconductor chiplet are formed directly on the substrate contact vias and electrically connected to the at least one through-substrate via. A metallic layer is formed on the backside of the semiconductor substrate including the at least one through-substrate via. The conductive structure including the metallic layer, the at least one through-substrate via, and the stack of the BEOL metal structures function as an electrical ground built into the semiconductor chip.

US Patent:

20150371763, Dec 24, 2015

Filed:

Jun 20, 2014

Appl. No.:

14/310054

Inventors:

- Armonk NY, US
WAN NI - San Jose CA, US
Michael J. Shapiro - AUSTIN TX, US
William F. Van Duyne - San Diego CA, US

International Classification:

H01F 27/28
H01F 41/04

Abstract:

Some examples describe a first helical electromagnetic coil of a transformer. In some instances, at least a portion of the first helical electromagnetic coil is inside a first semi-conductive substrate. Further, in some examples, the first helical electromagnetic coil has a shape with an internal space. Further, some examples describe a second helical electromagnetic coil of the transformer. In some instances, at least a portion of the second helical electromagnetic coil is nested within the internal space of the first helical electromagnetic coil. Further, in some examples, the at least the portion of the second electromagnetic coil is inside the first semi-conductive substrate.

US Patent:

20150371764, Dec 24, 2015

Filed:

Jun 20, 2014

Appl. No.:

14/310748

Inventors:

- Armonk NY, US
WAN NI - San Jose CA, US
Michael J. Shapiro - AUSTIN TX, US
William F. Van Duyne - San Diego CA, US

International Classification:

H01F 27/28
H01F 41/10
H01F 41/06

Abstract:

Some examples describe a first helical structure of an electromagnetic inductor coil. In some examples, at least a portion of the first helical structure of the electromagnetic inductor coil is inside a first substrate. Further, some examples describe a second helical structure of the electromagnetic inductor coil. In some instances, at least a portion of the second helical structure is nested within the first helical structure of the electromagnetic inductor coil. Further, in some examples, the at least the portion of the second helical structure is inside the first substrate.