Wei Ji Cao

US Patent:

6498091, Dec 24, 2002

Filed:

Nov 1, 2000

Appl. No.:

09/704161

Inventors:

Ling Chen - Sunnyvale CA
Seshadri Ganguli - Sunnyvale CA
Wei Cao - Milpitas CA
Christophe Marcadal - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L 214763

US Classification:

438627, 438643, 438653, 438685, 438687, 438694, 438695, 438696, 438707, 438763

Abstract:

A method and resultant structure of forming barrier layers in a via hole extending through an inter-level dielectric layer. A first barrier layer of TiSiN is conformally coated by chemical vapor deposition onto the bottom and sidewalls of the via holes and in the field area on top of the dielectric layer. A single plasma sputter reactor is used to perform two steps. In the first step, the wafer rather than the target is sputtered with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls. In the second step, a second barrier layer, for example of Ta/TaN, is sputter deposited onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls. Chamber conditions in the first step, including balancing neutrals and ions, may be controlled to remove the first barrier layer from the via bottom while leaving it on the more exposed the field area.

US Patent:

6607976, Aug 19, 2003

Filed:

Sep 25, 2001

Appl. No.:

09/964108

Inventors:

Ling Chen - Sunnyvale CA
Seshadri Ganguli - Sunnyvale CA
Christophe Marcadal - Santa Clara CA
Wei Cao - Milpitas CA
Roderick C. Mosely - Pleasanton CA
Mei Chang - Saratoga CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L 214763

US Classification:

438627, 438648, 438656, 438680, 438687

Abstract:

A method for forming a tungsten-containing copper interconnect barrier layer (e. g. , a tungsten [W] or tungsten-nitride [W N] copper interconnect barrier layer) on a substrate with a high (e. g. , greater than 30%) sidewall step coverage and ample adhesion to underlying dielectric layers. The method includes first depositing a thin titanium-nitride (TiN) or tantalum nitride (TaN) nucleation layer on the substrate, followed by the formation of a tungsten-containing copper interconnect barrier layer (e. g. , a W or W N copper interconnect barrier layer) overlying the substrate. The tungsten-containing copper interconnect barrier layer can, for example, be formed using a Chemical Vapor Deposition (CVD) technique that employs a fluorine-free tungsten-containing gas (e. g. , tungsten hexacarbonyl [W(CO) ]) or a WF -based Atomic Layer Deposition (ALD) technique. The presence of a thin TiN (or TaN) nucleation layer facilitates the formation of a tungsten-containing copper interconnect barrier layer with a sidewall step coverage of greater than 30% and ample adhesion to dielectric layers.

US Patent:

6660622, Dec 9, 2003

Filed:

Nov 7, 2002

Appl. No.:

10/290746

Inventors:

Ling Chen - Sunnyvale CA
Seshadri Ganguli - Sunnyvale CA
Wei Cao - Milpitas CA
Christophe Marcadal - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L 213205

US Classification:

438595

Abstract:

A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.

US Patent:

6730420, May 4, 2004

Filed:

Oct 31, 2000

Appl. No.:

09/703607

Inventors:

Gerardo Bertero - Redwood City CA
Tu Chen - Monte Sereno CA
Charles Chen - Milpitas CA
Wei Cao - Milpitas CA

Assignee:

Komag, Inc. - San Jose CA

International Classification:

G11B 566

US Classification:

428694TS, 428694 TM, 428900, 428216, 428336, 427131, 427132

Abstract:

A magnetic medium having at least two intermediate layers between an underlayer and a magnetic layer. The first intermediate layer is designed to provide a good lattice match to the underlayer, while the second intermediate layer is designed to provide a good lattice match to the magnetic layer. Typically, the underlayer has one structure, such as body centered cube, while the magnetic layer has a second structure such as hexagonal close pack. In preferred embodiments, the transition from the one structure to the other structure occurs in the intermediate layers. For example, the first intermediate layer may be a hexagonal close pack structure. Because of the mismatch between the underlayer and the first layer, there may be crystal defects in this first intermediate layer. However, any remaining stress and mismatch is absorbed through the second layer, so that the second layer presents a substantially defect-free surface on which the magnetic layer may grow. Because the second layer is closely matched to the magnetic layer, the magnetic layer continues to grow in a defect-free fashion.

US Patent:

6811814, Nov 2, 2004

Filed:

Jan 16, 2002

Appl. No.:

10/052049

Inventors:

Ling Chen - Sunnyvale CA
Wei Cao - Milpitas CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

C23C 1618

US Classification:

4272481, 427252, 42725528, 4272557

Abstract:

A method of growing a thin film onto a substrate. A precursor of the film is fed into a reaction space in the form of a vapor phase pulse causing the precursor to adsorb onto the surface of the substrate to form a layer thereof. A catalyst is susequently fed into the reaction space in an amount to substantially convert the layer of the precursor to the desired thin film. The above steps may be repeated to achieve the desired film thickness.

US Patent:

6953742, Oct 11, 2005

Filed:

Oct 25, 2003

Appl. No.:

10/693775

Inventors:

Ling Chen - Sunnyvale CA, US
Seshadri Ganguli - Sunnyvale CA, US
Wei Cao - Milpitas CA, US
Christophe Marcadal - Santa Clara CA, US

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L021/4763

US Classification:

438622, 438643, 438687

Abstract:

A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.

US Patent:

6972267, Dec 6, 2005

Filed:

Mar 4, 2003

Appl. No.:

10/379438

Inventors:

Wei Cao - Milpitas CA, US
Hua Chung - San Jose CA, US
Vincent Ku - Palo Alto CA, US
Ling Chen - Sunnyvale CA, US

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L021/31
H01L021/469

US Classification:

438785, 438627

Abstract:

Disclosed is a method and apparatus that features deposition of tantalum films employing sequential deposition techniques, such as Atomic Layer Deposition (ALD). The method includes serially exposing a substrate to a flow of a nitrogen-containing gas, such as ammonia NH, and a tantalum containing gas. The tantalum-containing gas is formed from a precursor, (BuN)Ta(NEt)(TBTDET), which is adsorbed onto the substrate. Prior to adsorption of TBTDET onto the substrate layer, the TBTDET precursor is heated within a predefined temperature range.

US Patent:

7122386, Oct 17, 2006

Filed:

Sep 21, 2005

Appl. No.:

11/231674

Inventors:

Tom Zhong - Cupertino CA, US
Wei Cao - San Jose CA, US
Po-Kang Wang - San Jose CA, US

Assignee:

MagIC Technologies, Inc. - Milpitas CA

International Classification:

H01L 21/00

US Classification:

438 3, 438240, 438E21665

Abstract:

A method of forming a Cu—Cu junction between a word line pad (WLP) and bit line (BL) contact is described. An opening above a WL contact is formed in a first SiNlayer on a substrate that includes a WLP and word line. After a bottom electrode (BE) layer, MTJ stack, and hard mask are sequentially deposited, an etch forms an MTJ element above the word line. Another etch forms a BE and exposes the first SiNlayer above the WLP and bond pad (BP). An MTJ ILD layer is deposited and planarized followed by deposition of a second SiNlayer and BL ILD layer. Trenches are formed in the BL ILD layer and second SiNlayer above the WLP, hard mask and BP. After vias are formed in the MTJ ILD and first SiNlayers above the WLP and BP, Cu deposition follows to form dual damascene BL contacts.