Wei Zheng

US Patent:

6534509, Mar 18, 2003

Filed:

Nov 15, 2000

Appl. No.:

09/713881

Inventors:

John G. Bauman - El Sobrante CA
Brad O. Buckman - Oakland CA
Ameen F. Ghannam - Briarcliff Manor NY
Joseph E. Hesselgesser - San Francisco CA
Richard Horuk - Lafayette CA
Imadul Islam - Hercules CA
Meina Liang - Danville CA
Karen B. May - Napa CA
Sean D. Monahan - Madison WI
Michael M. Morrissey - Danville CA
Howard P. Ng - El Sobrante CA
Kenneth J. Shaw - Brookside NJ
Guo Ping Wei - San Ramon CA
Wei Xu - Danville CA
Zuchun Zhao - Richmond CA
Wei Zheng - Blue Bell PA

Assignee:

Schering Aktiengesellschaft - Berlin

International Classification:

A61K 31495

US Classification:

51425501, 544387, 544388, 544391

Abstract:

This invention is directed to acyl piperazine derivatives, for example, of the following formula (1 ): wherein R , R , R , R , R , and R are descried herein. These derivatives are useful as anti-inflammatory agents. This invention is also directed to pharmacetutical compostions containing the derivatives, and methods of using the derivatives to treat inflammatory disorders in humans.

US Patent:

6541476, Apr 1, 2003

Filed:

Nov 14, 2000

Appl. No.:

09/713606

Inventors:

John G. Bauman - El Sobrante CA
Brad O. Buckman - Oakland CA
Ameen F. Ghannam - Briarcliff Manor NY
Joseph E. Hesselgesser - San Francisco CA
Richard Horuk - Lafayette CA
Imadul Islam - Hercules CA
Meina Liang - Danville CA
Karen B. May - Napa CA
Sean D. Monahan - Madison WI
Michael M. Morrissey - Danville CA
Howard P. Ng - El Sobrante CA
Kenneth J. Shaw - Brookside NJ
Guo Ping Wei - San Ramon CA
Wei Xu - Danville CA
Zuchun Zhao - Richmond CA
Wei Zheng - Blue Bell PA

Assignee:

Schering Aktiengesellschaft - Berlin

International Classification:

A61K 31496

US Classification:

51425213, 51425411, 544376

Abstract:

This invention is directed to acyl piperazine derivatives, for example, of the following formula (Ia): wherein R , R , R , R , R , and R are described herein. These derivatives are useful anti-inflammatory agents. This invention is also directed to pharmaceutical compositions containing the derivatives, and methods of using the derivatives to treat inflammatory disorders in humans.

US Patent:

6548855, Apr 15, 2003

Filed:

May 16, 2002

Appl. No.:

10/147622

Inventors:

Mark T. Ramsbey - Sunnyvale CA
Arvind Halliyal - Cupertino CA
Kuo-Tung Chang - Saratoga CA
Nicholas H. Tripsas - San Jose CA
Wei Zheng - Sunnyvale CA
Unsoon Kim - Santa Clara CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2976

US Classification:

257314, 257298, 257299, 438257, 438266

Abstract:

A non-volatile memory device for retention of data when electrical power is terminated. The non-volatile memory device includes at least one memory cell and a charge pump for stepping up the incoming voltage supply. The charge pump includes at least one capacitor, wherein the dielectric of the charge pump capacitor and the dielectric of the memory cell are formed during the same processing step.

US Patent:

6555537, Apr 29, 2003

Filed:

Nov 29, 2000

Appl. No.:

09/726808

Inventors:

John G. Bauman - El Sobrante CA
Brad O. Buckman - Oakland CA
Ameen F. Ghannam - Briarcliff Manor NY
Joseph E. Hesselgesser - San Francisco CA
Richard Horuk - Lafayette CA
Imadul Islam - Hercules CA
Meina Liang - Danville CA
Karen B. May - Napa CA
Sean D. Monahan - Madison WI
Michael M. Morrissey - Danville CA
Howard P. Ng - El Sobrante CA
Kenneth J. Shaw - Brookside NJ
Guo Ping Wei - San Ramon CA
Wei Xu - Danville CA
Zuchun Zhao - Richmond CA
Wei Zheng - Blue Bell PA

Assignee:

Schering Aktiengesellschaft - Berlin

International Classification:

A61K 31495

US Classification:

5142358, 51425211, 51425401, 51425402, 51425405, 51425408, 5142541, 51425501, 544121, 544357, 544366, 544367, 544372, 544373, 544379, 544391

Abstract:

This invention is directed to acyl piperazine derivatives, for example, of the following formula (Ia): wherein R , R , R , R , R , and R are described herein. These derivatives are useful as anti-inflammatory agents. This invention is also directed to pharmaceutical compositions containing the derivatives, and methods of using the derivatives to treat inflammatory disorders in humans.

US Patent:

6573266, Jun 3, 2003

Filed:

Nov 16, 2000

Appl. No.:

09/714937

Inventors:

John G. Bauman - El Sobrante CA
Brad O. Buckman - Oakland CA
Ameen F. Ghannam - Briarcliff Manor NY
Joseph E. Hesselgesser - San Francisco CA
Richard Horuk - Lafayette CA
Imadul Islam - Hercules CA
Meina Liang - Danville CA
Karen B. May - Napa CA
Sean D. Monahan - Madison WI
Michael M. Morrissey - Danville CA
Howard P. Ng - El Sobrante CA
Kenneth J. Shaw - Brookside NJ
Guo Ping Wei - San Ramon CA
Wei Xu - Danville CA
Zuchun Zhao - Richmond CA
Wei Zheng - Blue Bell PA

Assignee:

Schering Aktiengesellschaft - Berlin

International Classification:

A61K 31496

US Classification:

51425211, 51425213, 51425311, 51425407, 5142541, 544357, 544364, 544366, 544370, 544379

Abstract:

This invention is directed to acyl piperazine derivatives of the following formula (Id): wherein R , R , R , R , R and R are described herein. These derivatives are useful as anti-inflammatory agents. This invention is also directed to pharmaceutical compositions containing the derivatives, and methods of using the derivatives to treat inflammatory disorders in humans.

US Patent:

6630383, Oct 7, 2003

Filed:

Oct 17, 2002

Appl. No.:

10/274063

Inventors:

Effiong Ibok - Sunnyvale CA
Wei Zheng - Santa Clara CA
Nicholas H. Tripsas - San Jose CA
Mark T. Ramsbey - Sunnyvale CA
Fred T K Cheung - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 21336

US Classification:

438264, 438261, 438594, 257321, 257407

Abstract:

In one embodiment, a method of making a gate stack semiconductor device is disclosed. The method comprises the steps of: forming a tunnel oxide layer over a p-type semiconductor substrate; forming a floating gate over the tunnel oxide layer by first forming an n-type polysilicon layer and subjecting the n-type polysilicon layer to nitridation, and then forming a p-type polysilicon layer over the nitridated n-type polysilicon layer; and forming a high-K insulating layer over the p-type polysilicon layer.

US Patent:

6639271, Oct 28, 2003

Filed:

Dec 20, 2001

Appl. No.:

10/027253

Inventors:

Wei Zheng - Sunnyvale CA
Mark W. Randolph - San Jose CA
Nicholas H. Tripsas - San Jose CA
Zoran Krivokapic - Santa Clara CA
Jack F. Thomas - Palo Alto CA
Mark T. Ramsbey - Sunnyvale CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 29792

US Classification:

257324, 257329, 257314, 257327, 438212

Abstract:

A method of fabricating a dual bit dielectric memory cell structure on a silicon substrate includes implanting buried bit lines within the substrate and fabricating a layered island on the surface of the substrate between the buried bit lines. The island has a perimeter defining a gate region, and comprises a tunnel dielectric layer on the surface of the silicon on insulator wafer, an isolation barrier dielectric layer on the surface of the tunnel dielectric layer, a top dielectric layer on the surface of the isolation barrier dielectric layer, and a polysilicon gate on the surface of the top dielectric layer. A portion of the isolation barrier dielectric layer is removed to form an undercut region within the gate region and a charge trapping material is deposited within the undercut region.

US Patent:

6693321, Feb 17, 2004

Filed:

May 15, 2002

Appl. No.:

10/145952

Inventors:

Wei Zheng - Sunnyvale CA
Arvind Halliyal - Cupertino CA
Mark W. Randolph - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2976

US Classification:

257314, 257295, 257310, 257315, 257316

Abstract:

A method of making and a semiconductor device formed on a semiconductor substrate having an active region. The semiconductor device includes a gate dielectric layer disposed on the semiconductor substrate. A floating gate is formed on the gate dielectric layer and defines a channel interposed between a source and a drain formed within the active region of the semiconductor substrate. A control gate is formed above the floating gate. Further, the semiconductor device includes an intergate dielectric layer interposed between the floating gate and the control gate. The intergate dielectric layer including a first, a second and a third layers. The first layer formed on the floating gate. The second layer formed on the first layer. The third layer formed on the second layer. Each of the first, second and third layers has a dielectric constant greater than SiO and an electrical equivalent thickness of less than about 50 angstroms ( ) of SiO.