William M Hayward

US Patent:

48002992, Jan 24, 1989

Filed:

Dec 18, 1986

Appl. No.:

6/943976

Inventors:

William C. Hayward - Marina Del Rey CA

Assignee:

Northrop Corporation - Hawthorne CA

International Classification:

H03K 1908

US Classification:

307308

Abstract:

A method and electrical circuit for circumventing MOSFET failure resulting from exposure to high energy level radiation. The method includes the steps of turning the MOSFET on during the radiation event and keeping the MOSFET on at the end of the event until parasitic elements inherent in the MOSFET have recovered. In one presently preferred embodiment this method is implemented by providing a bipolar transistor across the voltage source of the MOSFET and the MOSFET gate. During exposure to radiation of very high intensity, radiation induced photo currents in the bipolar transistor turn the transistor on, thereby applying an "on enabling" voltage the gate of the MOSFET device to turn on the MOSFET device. The MOSFET, in an "on" state, effectively shorts out the inherent parasitic elements thereby preventing destruction of the parasitic elements and, consequently, the MOSFET. A resistor is provided to keep the MOSFET "on" until the parasitic elements recover.