William G Ledbetter

US Patent:

58595414, Jan 12, 1999

Filed:

Sep 15, 1993

Appl. No.:

8/122193

Inventors:

Steven Craig McMahan - Garland TX
Kenneth Charles Scheuer - Austin TX
William Burl Ledbetter - Austin TX
Michael Gordon Gallup - Austin TX
James George Gay - Pflugerville TX

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03K 1716
H03K 190175

US Classification:

326 30

Abstract:

A data processor has at least one output terminal which a user of the data processor can vary the output impedance thereof depending upon the application environment of the data processor. A first output buffer of an output buffer stage has a predetermined output impedance and is coupled between an input of the stage and the output terminal. The first output buffer provides a first output terminal impedance. A second output buffer having a lower output impedance than the first output buffer may be selectively coupled in parallel to the first output buffer to reduce the output impedance of the output terminal. The coupling of the output buffers is controlled by a user of the data processor who provides a control input for selecting one of a plurality of predetermined output terminal impedance values.

US Patent:

52948455, Mar 15, 1994

Filed:

Aug 17, 1992

Appl. No.:

7/931187

Inventors:

Steven C. McMahan - Richardson TX
Kenneth C. Scheuer - Austin TX
William B. Ledbetter - Austin TX
Michael G. Gallup - Austin TX
James G. Gay - Pflugerville TX

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03K 19003

US Classification:

307443

Abstract:

A data processor has at least one output terminal which a user of the data processor can vary the output impedance thereof depending upon the application environment of the data processor. A first output buffer of an output buffer stage has a predetermined output impedance and is coupled between an input of the stage and the output terminal. The first output buffer provides a first output terminal impedance. A second output buffer having a lower output impedance than the first output buffer may be selectively coupled in parallel to the first output buffer to reduce the output impedance of the output terminal. The coupling of the output buffers is controlled by a user of the data processor who provides a control input for selecting one of a plurality of predetermined output terminal impedance values.

US Patent:

51626721, Nov 10, 1992

Filed:

Dec 24, 1990

Appl. No.:

7/632901

Inventors:

Steven C. McMahan - Garland TX
Kenneth C. Scheuer - Austin TX
William B. Ledbetter - Austin TX
Michael G. Gallup - Austin TX
James G. Gay - Pflugerville TX

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03K 301

US Classification:

307443

Abstract:

A data processor has at least one output terminal which a user of the data processor can vary the output impedance thereof depending upon the application environment of the data processor. A first output buffer of an output buffer stage has a predetermined output impedance and is coupled between an input of the stage and the output terminal. The first output buffer provides a first output terminal impedance. A second output buffer having a lower output impedance then the first output buffer may be selectively coupled in parallel to the first output buffer to reduce the output impedance of the output terminal. The coupling of the output buffers is controlled by a user of the data processor who provides a control input for selecting one of a plurality of predetermined output terminal impedance values.