William Rader

US Patent:

6504422, Jan 7, 2003

Filed:

Nov 21, 2000

Appl. No.:

09/717769

Inventors:

William E. Rader - Carrboro NC
David P. Keesor - Durham NC

Assignee:

Semtech Corporation - Morrisville NC

International Classification:

G05F 300

US Classification:

327536, 327537

Abstract:

A charge pump power supply includes two or more modes of operation. An input protection circuit is connected between an input of the power supply and a voltage source. The input protection circuit regulates the voltage at the input of the power supply, limits current at the input when switching from a weaker mode to a stronger mode, and prevents current reversal when switching from a stronger mode to a weaker mode. In some modes, the power supply continuously provides current to the load, obviating the need for an output capacitor.

US Patent:

6794926, Sep 21, 2004

Filed:

Dec 5, 2002

Appl. No.:

10/313462

Inventors:

William E. Rader - Carrboro NC
David P. Keesor - Durham NC

Assignee:

Semtech Corporation - Morrisville NC

International Classification:

G05F 302

US Classification:

327536, 327534, 363 60

Abstract:

A charge pump power supply includes two or more modes of operation. An input protection circuit is connected between an input of the power supply and a voltage source. The input protection circuit regulates the voltage at the input of the power supply, limits current at the input when switching from a weaker mode to a stronger mode, and prevents current reversal when switching from a stronger mode to a weaker mode. In some modes, the power supply continuously provides current to the load, obviating the need for an output capacitor.

US Patent:

6836157, Dec 28, 2004

Filed:

May 9, 2003

Appl. No.:

10/434857

Inventors:

William E. Rader - Carrboro NC
Ryan P. Foran - Bullock NC

Assignee:

Semtech Corporation - Morrisville NC

International Classification:

H03K 522

US Classification:

327 66, 327 64, 315291, 315307

Abstract:

A plurality of LEDs is driven in parallel, in at least two modes. In a first mode, the LEDs are driven with a first voltage. In subsequent modes, the LEDs are driven with successively higher voltages. The forward voltage drop for each LED is monitored, and the driver switches from the first mode to successive modes based on the largest of the LED forward voltage drops. The current through each LED is controlled by directing a reference current through a first digitally controlled variable resistance circuit, and directing the LED current through a second digitally controlled variable resistance circuit having substantially a known ratio to the first variable resistance circuit and connected in series with the LED. A digital count is altered based on a comparison of the first and second currents, and the first and second variable resistance circuits are simultaneously altered based on the digital count.

US Patent:

7459959, Dec 2, 2008

Filed:

Nov 23, 2004

Appl. No.:

10/995573

Inventors:

William E. Rader - Carrboro NC, US
Ryan P. Foran - Bullock NC, US

Assignee:

Semtech Corporation - Morrisville NC

International Classification:

G05F 1/10

US Classification:

327536, 327535, 327538, 327534, 327533, 345 82, 345212, 345211

Abstract:

A plurality of LEDs is driven in parallel, in at least two modes. In a first mode, the LEDs are driven with a first voltage. In subsequent modes, the LEDs are driven with successively higher voltages. The forward voltage drop for each LED is monitored, and the driver switches from the first mode to successive modes based on the largest of the LED forward voltage drops. The current through each LED is controlled by directing a reference current through a first digitally controlled variable resistance circuit, and directing the LED current through a second digitally controlled variable resistance circuit having substantially a known ratio to the first variable resistance circuit and connected in series with the LED. A digital count is altered based on a comparison of the first and second currents, and the first and second variable resistance circuits are simultaneously altered based on the digital count.

US Patent:

60576073, May 2, 2000

Filed:

Jul 16, 1999

Appl. No.:

9/354630

Inventors:

William Edward Rader - Cary NC
John Fogg - Apex NC

Assignee:

Semtech Corporation - Newbury Park CA

International Classification:

H02J 100

US Classification:

307 11

Abstract:

A step-down switched-mode power supply circuit includes a transformer having at least one primary winding and at least one secondary winding, a current sensing device for sensing a current through a primary winding of the transformer, a first switch and a second switch, a first comparator for determining if the current through the current sensing device exceeds a threshold, a voltage regulator coupled to the secondary winding to produce a regulated voltage, a second comparator for determining if the regulated voltage has drooped below an acceptable level, a counter coupled to the second comparator for generating a signal having a fixed number of switch cycles, and control circuitry for generating signals controlling the first switch and the second switch and responsive to the first comparator to enter a power saving mode disabling the signals, and to the second comparator to temporarily exit the power saving mode for a fixed number of cycles when the regulated voltage has drooped below an acceptable level.

US Patent:

62395092, May 29, 2001

Filed:

Mar 30, 2000

Appl. No.:

9/539275

Inventors:

William Edward Rader - Cary NC
John Fogg - Apex NC

Assignee:

Semtech Corporation - Newbury Park CA

International Classification:

H02J 300

US Classification:

307 11

Abstract:

A step-down switched-mode power supply circuit includes a transformer having at least one primary winding and at least one secondary winding, a current sensing device for sensing a current through a primary winding of the transformer, a first switch and a second switch, a first comparator for determining if the current through the current sensing device exceeds a threshold, a voltage regulator coupled to the secondary winding to produce a regulated voltage, a second comparator for determining if the regulated voltage has drooped below an acceptable level, a counter coupled to the second comparator for generating a signal having a fixed number of switch cycles, and control circuitry for generating signals controlling the first switch and the second switch and responsive to the first comparator to enter a power saving mode disabling the signals, and to the second comparator to temporarily exit the power saving mode for a fixed number of cycles when the regulated voltage has drooped below an acceptable level.

US Patent:

20200076306, Mar 5, 2020

Filed:

Aug 29, 2019

Appl. No.:

16/556068

Inventors:

- San Diego CA, US
William Rader - Carrboro NC, US

International Classification:

H02M 3/158
H02M 1/08

Abstract:

A buck-or-boost switching regulator circuit includes an analog control circuit that generates a control signal to control the buck-or-boost switching regulator circuit to operate in different modes including a buck mode, a boost mode, and a pass mode. A first amplifier in the control loop circuit generates a first error signal based on one or more of an output voltage, an input current and an output current of the buck-or-boost switching regulator, and a reference voltage. The control signal is based on the first error signal. A control signal adjustment circuit, coupled to an output of the first amplifier, prevents the control signal from getting high enough to be sliced by a boost voltage ramp signal or to be low enough to be sliced by a buck voltage ramp signal based on an input voltage and an output voltage of the buck-or-boost switching regulator circuit.

US Patent:

20160276932, Sep 22, 2016

Filed:

Jul 7, 2015

Appl. No.:

14/793147

Inventors:

- San Diego CA, US
William Rader - Carrboro NC, US

International Classification:

H02M 3/158

Abstract:

In one embodiment, a method receives a shed comparison signal that is based on a comparison of a voltage detected from a voltage converter to a reference voltage and receives a zero cross signal that indicates whether a current from the voltage converter has crossed zero. The shed comparison signal is sampled for a first number of clock cycles to generate shed comparison sampled values. Also, the zero cross signal is sampled for a second number of clock cycles to generate zero cross sampled values where the second number of clock cycles are less than the first number of clock cycles. The method determines a change between a shed state and an unshed state based on the shed comparison sampled values for the first number of clock cycles or the zero cross sampled values for the second number of clock cycles.