William D Wong

US Patent:

7384211, Jun 10, 2008

Filed:

Jan 4, 2005

Appl. No.:

11/029743

Inventors:

William Ah-Min Wong - Whittier CA, US

Assignee:

Disney Enterprises, Inc. - Burbank CA

International Classification:

E01F 13/00

US Classification:

404 6, 49 9, 49 34, 256 1

Abstract:

Cable crash barrier apparatus precludes unwanted ingress and egress and electronically monitors breaches. Substantial thickness of the cable provides mechanical integrity resistant to, for example, a 400 lb. vehicle traveling at speeds up to at least about 52 miles per hour, while flexibility protects a central conducting member effective for forming a low-voltage circuit, the cable being supported by a plurality of anchoring members and not detracting from overall aesthetic of the area being circumnavigated.

US Patent:

7466228, Dec 16, 2008

Filed:

Jul 24, 2006

Appl. No.:

11/459603

Inventors:

William Ah-Min Wong - Whittier CA, US

Assignee:

Disney Enterprises, Inc. - Burbank CA

International Classification:

G08B 13/00
G08B 13/18
G08B 13/26
E01F 13/00

US Classification:

340541, 340550, 340552, 340564, 404 6

Abstract:

Cable crash barrier apparatus precludes unwanted ingress and egress and electronically monitors breaches. Substantial thickness of the cable provides mechanical integrity resistant to, for example, a 400 lb. vehicle traveling at speeds up to at least about 52 miles per hour, while flexibility protects a central conducting member effective for forming a low-voltage circuit, the cable being supported by a plurality of anchoring members and not detracting from overall aesthetic of the area being circumnavigated.

US Patent:

7613887, Nov 3, 2009

Filed:

Sep 18, 2006

Appl. No.:

11/522726

Inventors:

William C. Wong - Cerritos CA, US
Kha Nguyen - Anaheim CA, US
Huy Tu Nguyen - Laguna Hills CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

G06F 12/00

US Classification:

711154, 711117, 710 52

Abstract:

A memory management system for a memory in a data storage device comprises a memory controller module that receives a frame of data including a plurality of data words from a host, that generates boundary indicators based on at least one of a start and an end of the frame and the plurality of data words, and that inserts the boundary indicators into the frame of data and a memory that receives the frame of data and stores the frame of data including the data words and the boundary indicators during transmission between the host and the storage device.

US Patent:

7836230, Nov 16, 2010

Filed:

Feb 12, 2008

Appl. No.:

12/030165

Inventors:

William C. Wong - Cerritos CA, US
Huy Tu Nguyen - Laguna Hills CA, US
Kha Nguyen - Anaheim CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

G06F 3/00

US Classification:

710 53, 710 52, 710 57, 711105, 711160, 711162, 714758, 714762

Abstract:

Management of requests from a host to an external storage medium. An execution queue stores commands to be executed, and each command corresponds to a request from the host for data. A holding queue stores executed commands until receipt of an acknowledgment from the host that the host has, e. g. , received the data corresponding to the command from the external storage medium. An outgoing queue stores acknowledged commands and has a maximum storage limit. A counter is provided, and a separate logic block increments the counter when a command is stored in the execution queue and decrements the counter when an acknowledged command is deleted from the outgoing queue. The separate logic disables execution of commands stored in the execution queue when the value of the counter equals the maximum storage limit of the outgoing queue.

US Patent:

7849259, Dec 7, 2010

Filed:

Feb 12, 2008

Appl. No.:

12/030162

Inventors:

William Wong - Cerritos CA, US
Kha Nguyen - Anaheim CA, US
Huy Tu Nguyen - Laguna Hills CA, US
William Dennin, III - Mission Viejo CA, US
Roger Baldwin - Mission Viejo CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

G06F 12/00
G06F 13/00
G06F 13/28
G06F 3/00
G06F 5/00

US Classification:

711112, 711119, 711154, 710 53, 710 54

Abstract:

An execution queue stores a write command from the host in response to issuance of the write command from the host, and is removed from the execution queue in response to a signal indicating that data designated by the write command has been written to the hard disk. A holding queue stores the write command removed from the execution queue. In response to the command being stored in the holding queue, a request is issued for an acknowledgment from the host. The write command is removed from the holding queue in response to the acknowledgment being received from the host. An outgoing queue stores the write command removed from the holding queue for deletion. The queues are controlled by queue management hardware, the request is issued by the queue management hardware, and the signal and acknowledgment are received by the queue management hardware.

US Patent:

7949838, May 24, 2011

Filed:

Nov 3, 2009

Appl. No.:

12/611131

Inventors:

William C. Wong - Cerritos CA, US
Kha Nguyen - Anaheim CA, US
Huy Tu Nguyen - Laguna Hills CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

G06F 12/00

US Classification:

711154

Abstract:

A memory management system includes a memory controller module configured to receive a frame of data. The frame of data includes a plurality of data words that generate boundary indicators based on at least one of a start of the frame and an end of the frame. The plurality of data words inserts the boundary indicators into the frame of data. The memory is configured to store the frame of data, including the data words and the boundary indicators, during transmission of the frame of data between a host and a storage device.

US Patent:

7953907, May 31, 2011

Filed:

Aug 16, 2007

Appl. No.:

11/840059

Inventors:

Huy Tu Nguyen - Laguna Hills CA, US
William C. Wong - Cerritos CA, US
Kha Nguyen - Anaheim CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

G06F 3/00
G06F 11/00

US Classification:

710 52, 710 15, 710 16, 710 17, 710 18, 710 19, 710 21, 710 57, 714 48, 714100, 714769, 370216, 370242

Abstract:

A FIFO memory has integrated error management to react to different errors according to the current state of operation of the input and output as well as internal conditions such as buffer memory status. The FIFO memory completes or aborts current operations according to state and leaves the FIFO memory in known condition following error handling. Thus, data sent to a host avoids data gaps or data overlaps because the FIFO memory leaves operations in a known state before reporting the error to a controller.

US Patent:

8032674, Oct 4, 2011

Filed:

Jul 19, 2004

Appl. No.:

10/894208

Inventors:

Kha Nguyen - Anaheim CA, US
William C. Wong - Cerritos CA, US
Mouluan Jang - Cerritos CA, US
Jane X. Wang - Irvine CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

G06F 5/00
G06F 11/00

US Classification:

710 53, 710 52, 710 57, 377 28, 377 37, 377 39, 714706

Abstract:

A method for maintaining flow control in a buffer memory coupled to a storage controller is provided. The storage controller includes, first and second counters that are used to monitor when data is read from a buffer memory and when data is transferred from the buffer memory to the host. The method includes, incrementing first and second counter values when data is placed in the buffer memory; decrementing a first counter value when data is read from the buffer memory; and decrementing the second counter value when data is sent to a host. The method further includes, pausing a first channel logic between a transport module and a storage disk when there is no data in the buffer memory; and pausing a second channel logic between a disk and the buffer if there is no space in the buffer memory.