Xinhui Wang

US Patent:

7049247, May 23, 2006

Filed:

May 3, 2004

Appl. No.:

10/838849

Inventors:

Stephen M. Gates - Ossining NY, US
Alfred Grill - White Plains NY, US
David R. Medeiros - Ossining NY, US
Deborah Neumayer - Danbury CT, US
Son Van Nguyen - Yorktown Heights NY, US
Vishnubhai V. Patel - Yorktown Heights NY, US
Xinhui Wang - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/31

US Classification:

438778, 438780, 438782

Abstract:

A method for fabricating a thermally stable ultralow dielectric constant film comprising Si, C, O and H atoms in a parallel plate chemical vapor deposition process utilizing a plasma enhanced chemical vapor deposition (“PECVD”) process is disclosed. Electronic devices containing insulating layers of thermally stable ultralow dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of a thermally stable ultralow dielectric constant film, specific precursor materials are used, such as, silane derivatives, for instance, diethoxymethylsilane (DEMS) and organic molecules, for instance, bicycloheptadiene and cyclopentene oxide.

US Patent:

7312524, Dec 25, 2007

Filed:

Jan 3, 2006

Appl. No.:

11/324479

Inventors:

Stephen M. Gates - Ossining NY, US
Alfred Grill - White Plains NY, US
David R. Medeiros - Ossining NY, US
Deborah Newmayer - Danbury CT, US
Son Van Nguyen - Yorktown Heights NY, US
Vishnubhai V. Patel - Yorktown Heights NY, US
Xinhui Wang - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 23/12
H01L 23/053

US Classification:

257701, 257760, 257E21, 257 17, 257277, 257218

Abstract:

A method for fabricating a thermally stable ultralow dielectric constant film including Si, C, O and H atoms in a parallel plate chemical vapor deposition process utilizing a plasma enhanced chemical vapor deposition (“PECVD”) process is disclosed. Electronic devices containing insulating layers of thermally stable ultralow dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of a thermally stable ultralow dielectric constant film, specific precursor materials are used, such as, silane derivatives, for instance, diethoxymethylsilane (DEMS) and organic molecules, for instance, bicycloheptadiene and cyclopentene oxide.

US Patent:

7872303, Jan 18, 2011

Filed:

Aug 14, 2008

Appl. No.:

12/191425

Inventors:

Kevin K. Chan - Staten Island NY, US
Qiqing Christine Ouyang - Yorktown Heights NY, US
Xinhui Wang - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/00

US Classification:

257329, 257332, 257369, 257619, 257E21403, 257E21632, 257E27067, 257E29056, 257E29246, 257E29275

Abstract:

At least one gate dielectric, a gate electrode, and a gate cap dielectric are formed over at least one channel region of at least one semiconductor fin. A gate spacer is formed on the sidewalls of the gate electrode, exposing end portions of the fin on both sides of the gate electrode. The exposed portions of the semiconductor fin are vertically and laterally etched, thereby reducing the height and width of the at least one semiconductor fin in the end portions. Exposed portions of the insulator layer may also be recessed. A lattice-mismatched semiconductor material is grown on the remaining end portions of the at least one semiconductor fin by selective epitaxy with epitaxial registry with the at least one semiconductor fin. The lattice-mismatched material applies longitudinal stress along the channel of the finFET formed on the at least one semiconductor fin.

US Patent:

7955928, Jun 7, 2011

Filed:

Mar 30, 2009

Appl. No.:

12/413836

Inventors:

Kevin K. Chan - Staten Island NY, US
Zhibin Ren - Hopewell Junction NY, US
Xinhui Wang - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/8242

US Classification:

438249, 257E21468

Abstract:

A CMOS FinFET device and a method of manufacturing the same using a three dimensional doping process is provided. The method of forming the CMOS FinFET includes forming fins on a first side and a second side of a structure and forming spacers of a dopant material having a first dopant type on the fins on the first side of the structure. The method further includes annealing the dopant material such that the first dopant type diffuses into the fins on the first side of the structure. The method further includes protecting the first dopant type from diffusing into the fins on the second side of the structure during the annealing.

US Patent:

8431994, Apr 30, 2013

Filed:

Mar 16, 2010

Appl. No.:

12/724555

Inventors:

Kevin K. Chan - Staten Island NY, US
Zhibin Ren - Hopewell Jct. NY, US
Xinhui Wang - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 29/76

US Classification:

257345, 257410, 257412, 257413, 257E29286

Abstract:

Silicon-on-insulator (SOI) structures with silicon layers less than 20 nm thick are used to form extremely thin silicon-on-insulator (ETSOI) semiconductor devices. ETSOI devices are manufactured using a thin tungsten backgate encapsulated by thin nitride layers to prevent metal oxidation, the tungsten backgate being characterized by its low resistivity. The structure further includes at least one FET having a gate stack formed by a high-K metal gate and a tungsten region superimposed thereon, the footprint of the gate stack utilizing the thin SOI layer as a channel. The SOI structure thus formed controls the Vt variation from the thin SOI thickness and dopants therein. The ETSOI high-K metal backgate fully depleted device in conjunction with the thin BOX provides an excellent short channel control and significantly lowers the drain induced bias and sub-threshold swings. The present structure supports the evidence of the stability of the wafer having a tungsten film during thermal processing, and especially during STI and contact formation.

US Patent:

20110079855, Apr 7, 2011

Filed:

Oct 6, 2009

Appl. No.:

12/574296

Inventors:

Kevin K. CHAN - Staten Island NY, US
Zhibin REN - Hopewell Junction NY, US
Xinhui WANG - Portland OR, US
Keith Kwong Hon WONG - Wappingers Falls NY, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

H01L 27/088
H01L 21/8234
G06F 17/50

US Classification:

257368, 438300, 257E21619, 257E2706, 716136, 716100

Abstract:

FinFETs are merged together by a metal. The method of manufacturing the FinFETs include forming a plurality of fin bodies on a substrate and merging the fin bodies with a metal. The method further includes implanting source and drain regions through the metal.

US Patent:

20130032865, Feb 7, 2013

Filed:

Sep 7, 2012

Appl. No.:

13/606873

Inventors:

Kevin K. Chan - Staten Island NY, US
Young-Hee Kim - Mohegan Lake NY, US
Isaac Lauer - Mahopac NY, US
Ramachandran Muralidhar - Mahopac NY, US
Xinhui Wang - Poughkeepsie NY, US
Min Yang - Yorktown Heights NY, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

H01L 29/78

US Classification:

257288, 257E29255

Abstract:

Field effect transistors fabricated using atomic layer doping processes are disclosed. In accordance with an embodiment of an atomic layer doping method, a semiconducting surface and a dopant gas mixture are prepared. Further, a dopant layer is grown on the semiconducting surface by applying the dopant gas mixture to the semiconducting surface under a pressure that is less than 500 Torr and a temperature that is between 300 C. and 750 C. The dopant layer includes at least 4×10active dopant atoms per cmthat react with atoms on the semiconducting surface such that the reacted atoms increase the conductivity of the semiconducting surface.

US Patent:

20130032883, Feb 7, 2013

Filed:

Aug 4, 2011

Appl. No.:

13/198255

Inventors:

Kevin K. Chan - Staten Island NY, US
Young-Hee Kim - Mohegan Lake NY, US
Isaac Lauer - Mahopac NY, US
Ramachandran Muralidhar - Mahopac NY, US
Xinhui Wang - Poughkeepsie NY, US
Min Yang - Yorktown Heights NY, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

H01L 29/78
H01L 21/336
H01L 21/24

US Classification:

257365, 438537, 438301, 257408, 257E29264, 257E21409, 257E21154

Abstract:

Field effect transistors fabricated using atomic layer doping processes are disclosed. In accordance with an embodiment of an atomic layer doping method, a semiconducting surface and a dopant gas mixture are prepared. Further, a dopant layer is grown on the semiconducting surface by applying the dopant gas mixture to the semiconducting surface under a pressure that is less than 500 Torr and a temperature that is between 300 C. and 750 C. The dopant layer includes at least 4×10active dopant atoms per cmthat react with atoms on the semiconducting surface such that the reacted atoms increase the conductivity of the semiconducting surface.