Yee Ling Cheung - Irvine CA Kevin T. Chan - Pasadena CA Siavash Fallahi - Newport Coast CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03F 136
US Classification:
330 86, 330144, 330282, 330284
Abstract:
A programmable gain amplifier (PGA) has an amplifier and a variable resistor that is connected to the output of the amplifier. The variable resistor includes a resistor that is connected to a reference voltage and multiple parallel taps that tap off the resistor. A two-stage switch network having fine stage switches and coarse stage switches connects the resistor taps to an output node of the PGA. The taps and corresponding fine stage switches are arranged into two or more groups, where each group has n-number of fine stage switches and corresponding taps. One terminal of each fine stage switch is connected to the corresponding resistor tap, and the other terminal is connected to an output terminal for the corresponding group. The coarse stage switches select from among the groups of fine stage switches, and connect to the output of the PGA. During operation, one selected tap is connected to the output of the PGA by closing the appropriate fine stage switch and coarse stage switch, where the selected tap defines a selected group of the fine stage switches.
Jan Mulder - Houten, NL Yee Ling Cheung - Irvine CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03K 522
US Classification:
327 65, 327562, 330263, 330264
Abstract:
A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and fourth transistors are connected to a positive output of the differential line driver. First, second, third and fourth switching transistors are connected in series with corresponding first, second, third and fourth cascode transistors and driven by a data signal. First and second compound transistors inputting a class AB operation signal at their gates, wherein the first compound transistor is connected to sources of the first and second switching transistors, and wherein the second compound transistor is connected to sources of the third and fourth switching transistors.
Jan Mulder - Houten, NL Yee Ling Cheung - Irvine CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03K005/22
US Classification:
327 65, 327562, 330263, 330264
Abstract:
A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and fourth transistors are connected to a positive output of the differential line driver. First, second, third and fourth switching transistors are connected in series with corresponding first, second, third and fourth cascode transistors and driven by a data signal. First and second compound transistors inputting a class AB operation signal at their gates, wherein the first compound transistor is connected to sources of the first and second switching transistors, and wherein the second compound transistor is connected to sources of the third and fourth switching transistors.
Regulated Charge Pump With Digital Resistance Control
Yee Ling Cheung - Irvine CA, US Chun-Ying Chen - Irvine CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G05F 1/10 G05F 3/02
US Classification:
327536
Abstract:
A charge pump includes a resistor divider connected between an output voltage node and ground and a comparator inputting a reference voltage at one input, and a divided voltage from the resistor divider at another input. A digital control circuit is enabled by the comparator. A first transistor and a second transistor are in series between an input voltage node and the ground, both transistors controlled by the digital control circuit. A pump capacitor is connected between to the output voltage node and between the first and second transistor, and being charged by turning the first and second transistors on and off. A first diode is between the pump capacitor and the input voltage node. A second diode between the pump capacitor and the output voltage node. A reservoir capacitor between the output voltage node and ground. The digital control circuit comprises a first shift register.
Josephus A. E. P. van Engelen - Aliso Viejo CA, US Yee Ling Cheung - Irvine CA, US Mark J Chambers - Mission Viejo CA, US Darwin Cheung - Irvine CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H02H 3/42
US Classification:
361 88, 361 87
Abstract:
A signal driving system generates an output swinging between a first power supply (e. g. , about 1. 2 Volts), powering first and second drivers, and a second power supply (e. g. , about 3. 3 Volts), powering a first current mirror. The second power supply is generated external to the signal driving system and is used to allow for a desired common-mode differential output signal range. However, the second power supply produces voltage at a level above a rating of the devices in the signal driving system. Therefore, protection devices are used to protect the elements of the signal driving system from the second power supply. Accordingly, through use of the signal driving system of the present invention, a high voltage current mode driver can operate in a low voltage process without damaging the devices in the signal driving system.
Method And System For A Control Scheme On Power And Common-Mode Voltage Reduction For A Transmitter
Yee Ling Cheung - Irvine CA, US Kevin T. Chan - Pasadena CA, US Jan Mulder - Houten, NL
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03M 1/66
US Classification:
341144, 341136
Abstract:
Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The method includes identifying a phase control signal from an adjacent current cell preceding the particular current cell in time and logically ORing the phase control signal from the preceding cell with a phase control signal from the particular current cell.
Regulated Charge Pump With Digital Resistance Control
Yee Ling Cheung - Irvine CA, US Chun-Ying Chen - Irvine CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G05F 1/10 G00F 3/02
US Classification:
327536
Abstract:
A charge pump includes a resistor divider connected between an output voltage node and ground and a comparator inputting a reference voltage at one input, and a divided voltage from the resistor divider at another input. A digital control circuit is enabled by the comparator. A first transistor and a second transistor are in series between an input voltage node and the ground, both transistors controlled by the digital control circuit. A pump capacitor is connected between to the output voltage node and between the first and second transistor, and being charged by turning the first and second transistors on and off. A first diode is between the pump capacitor and the input voltage node. A second diode between the pump capacitor and the output voltage node. A reservoir capacitor between the output voltage node and ground. The digital control circuit comprises a first shift register.
Method And System For A Control Scheme On Power And Common-Mode Voltage Reduction For A Transmitter
Yee Ling Cheung - Irvine CA, US Kevin T. Chan - Pasadena CA, US Jan Mulder - Houten, NL
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H04B 1/04
US Classification:
4551275, 455436, 4555531, 375316, 714791
Abstract:
Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The transmitter includes a plurality of current cells. Each cell is configurable for operating in different modes. The method includes determining a first probability associated with transmitting data at a particular symbolic level and determining a second probability associated with each cell being used during a transmission at the particular symbolic level. Next, one of the modes for each cell is selected in accordance with anticipated performance requirements. An average current of the transmitter is then calculated based upon the determined first and second probabilities and the selected modes.