Ying Li

US Patent:

6921711, Jul 26, 2005

Filed:

Sep 9, 2003

Appl. No.:

10/605106

Inventors:

Cyril Cabral, Jr. - Ossining NY, US
Paul C. Jamison - Hopewell Junction NY, US
Victor Ku - Yorktown Heights NY, US
Ying Li - Poughkeepsie NY, US
Vijay Narayanan - New York NY, US
An L Steegen - Stamford CT, US
Yun-Yu Wang - Poughquag NY, US
Kwong H. Wong - Wappingers Falls NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L021/443

US Classification:

438589, 438592, 438595

Abstract:

A structure and method for a metal replacement gate of a high performance device is provided. A sacrificial gate structure is first formed on an etch stop layer provided on a semiconductor substrate. A pair of spacers is provided on sidewalls of the sacrificial gate structure. The sacrificial gate structure is then removed, forming an opening. Subsequently, a metal gate including an first layer of metal such as tungsten, a diffusion barrier such as titanium nitride, and a second layer of metal such as tungsten is formed in the opening between the spacers.

US Patent:

7035435, Apr 25, 2006

Filed:

May 7, 2002

Appl. No.:

10/140511

Inventors:

Ying Li - Los Angeles CA, US
Tong Zhang - Mountain View CA, US
Daniel R. Tretter - San Jose CA, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06K 1/00

US Classification:

382107, 382173, 348700, 7071041

Abstract:

A method and system for automatically summarizing a video document. The video document is decomposed into scenes, shots and frames, and an importance value is assigned to each scene, shot and frame. Keyframes are allocated among the shots based on the importance value of each shot. The allocated number of keyframes are then selected from each shot. The number of keyframes may be altered for greater or lesser detail in response to user input.

US Patent:

7306983, Dec 11, 2007

Filed:

Dec 10, 2004

Appl. No.:

10/905024

Inventors:

Dureseti Chidambarrao - Weston CT, US
Ying Li - Newburgh NY, US
Rajeev Malik - Pleasantville NY, US
Shreesh Narasimha - Beacon NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/8238

US Classification:

438199, 438230, 438581, 438583, 438791, 438FOR 431, 257E21292, 257E21293

Abstract:

The present invention provides a semiconductor device having dual nitride liners, a silicide layer, and a protective layer beneath one of the nitride liners for preventing the etching of the silicide layer. A first aspect of the invention provides a method for use in the manufacture of a semiconductor device comprising the steps of applying a protective layer to a device, applying a first silicon nitride liner to the device, removing a portion of the first silicon nitride liner, removing a portion of the protective layer, and applying a second silicon nitride liner to the device.

US Patent:

7348635, Mar 25, 2008

Filed:

Dec 10, 2004

Appl. No.:

10/905025

Inventors:

Dureseti Chidambarrao - Weston CT, US
Ying Li - Newburgh NY, US
Rajeev Malik - Pleasantville NY, US
Shreesh Narasimha - Beacon NY, US
Haining Yang - Wappingers Falls NY, US
Huilong Zhu - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 31/00

US Classification:

257369, 257E27062

Abstract:

The present invention provides a semiconductor device having dual nitride liners, which provide an increased transverse stress state for at least one FET and methods for the manufacture of such a device. A first aspect of the invention provides a method for use in the manufacture of a semiconductor device comprising the steps of applying a first silicon nitride liner to the device and applying a second silicon nitride liner adjacent the first silicon nitride liner, wherein at least one of the first and second silicon nitride liners induces a transverse stress in a silicon channel beneath at least one of the first and second silicon nitride liner.

US Patent:

7382933, Jun 3, 2008

Filed:

Aug 24, 2005

Appl. No.:

11/210305

Inventors:

Chitra Dorai - Chappaqua NY, US
Ying Li - Mohegan Lake NY, US
Youngja Park - Edgewater NJ, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06K 9/36

US Classification:

382276, 382164, 382168, 382171, 382173

Abstract:

System and method for partitioning a video into a series of semantic units where each semantic unit relates to a generally complete thematic topic. A computer implemented method for partitioning a video into a series of semantic units wherein each semantic unit relates to a theme or a topic, comprises dividing a video into a plurality of homogeneous segments, analyzing audio and visual content of the video, extracting a plurality of keywords from the speech content of each of the plurality of homogeneous segments of the video, and detecting and merging a plurality of groups of semantically related and temporally adjacent homogeneous segments into a series of semantic units in accordance with the results of both the audio and visual analysis and the keyword extraction. The present invention can be applied to generate important table-of-contents as well as index tables for videos to facilitate efficient video topic searching and browsing.

US Patent:

7446062, Nov 4, 2008

Filed:

Dec 10, 2004

Appl. No.:

10/905027

Inventors:

Dureseti Chidambarrao - Weston CT, US
Ying Li - Newburgh NY, US
Rajeev Malik - Pleasantville NY, US
Shreesh Narasimha - Beacon NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/318
H01L 21/44

US Classification:

438791, 438655, 438682

Abstract:

The present invention provides a semiconductor device having dual silicon nitride liners and a reformed silicide layer and related methods for the manufacture of such a device. The reformed silicide layer has a thickness and resistance substantially similar to a silicide layer not exposed to the formation of the dual silicon nitride liners. A first aspect of the invention provides a method for use in the manufacture of a semiconductor device comprising the steps of applying a first silicon nitride liner to a silicide layer, removing a portion of the first silicon nitride liner, reforming a portion of the silicide layer removed during the removal step, and applying a second silicon nitride liner to the silicide layer.

US Patent:

7446395, Nov 4, 2008

Filed:

Aug 28, 2007

Appl. No.:

11/845888

Inventors:

Dureseti Chidambarrao - Weston CT, US
Ying Li - Newburgh NY, US
Rajeev Malik - Pleasantville NY, US
Shreesh Narasimha - Beacon NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 23/58

US Classification:

257640, 257641, 257649, 257760, 257E21148, 438FOR 127

Abstract:

The present invention provides a semiconductor device having dual nitride liners, a silicide layer, and a protective layer beneath one of the nitride liners for preventing the etching of the silicide layer. A first aspect of the invention provides a semiconductor device comprising a protective layer adjacent a first device, a first silicon nitride liner over the protective layer, a second silicon nitride liner adjacent a second device, and a first silicide layer adjacent the first device and a second silicide layer adjacent the second device, wherein a thickness is substantially the same in the first and second silicide layers.

US Patent:

7732270, Jun 8, 2010

Filed:

Jan 11, 2008

Appl. No.:

11/972964

Inventors:

Dureseti Chidambarrao - Weston CT, US
Ying Li - Newburgh NY, US
Rajeev Malik - Pleasantville NY, US
Shreesh Narasimha - Beacon NY, US
Haining Yang - Wappingers Fall NY, US
Huilong Zhu - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/8238

US Classification:

438199, 438938, 257E27046

Abstract:

The present invention provides a semiconductor device having dual nitride liners, which provide an increased transverse stress state for at least one FET and methods for the manufacture of such a device. A first aspect of the invention provides a method for use in the manufacture of a semiconductor device comprising the steps of applying a first silicon nitride liner to the device and applying a second silicon nitride liner adjacent the first silicon nitride liner, wherein at least one of the first and second silicon nitride liners induces a transverse stress in a silicon channel beneath at least one of the first and second silicon nitride liner.