Yong Hui Liu

Address:

4750 NW 122 Dr, Coral Springs, FL 33076

Phone:

(954)9075588

VIN:

SALFR2BN4CH318559

Make:

LAND ROVER

Model:

LR2

Year:

2012

US Patent:

7564842, Jul 21, 2009

Filed:

Jul 1, 2004

Appl. No.:

10/882808

Inventors:

Lance Eric Hester - Sunrise FL, US
Vernon Anthony Allen - Fort Lauderdale FL, US
Jasmeet Chhabra - Hillsboro OR, US
Lakshman Krishnamurthy - Portland OR, US
Ralph M. Kling - Sunnyvale CA, US
Zafer Sahinoglu - Somerville MA, US
Philip V. Orlik - Cambridge MA, US
Phil Jamieson - Dorking, GB
Phil Rudland - Horley, GB
Zachary Smith - Bayerville MA, US
Myung J. Lee - Paramus NJ, US
Xuhui Hu - Brooklyn NY, US
Yong Liu - Brooklyn NY, US
Chunhui Zhu - Rego Park NY, US

Assignee:

Mitsubishi Electric Research Laboratories, Inc. - Cambridge MA
Samsung Electronics Co. Ltd.
Intel Corporation - Santa Clara CA
NXP B.V.
Motorola, Inc. - Schaumburg IL

International Classification:

H04L 12/28
H04L 12/56

US Classification:

370389, 37039531

Abstract:

The disclosure is a routing method for data in a personal area network. The personal area network includes a plurality of nodes. The method includes receiving a frame at a node, determining whether the node contains a routing table entry for the frame destination, and when the node contains a routing table entry, determining a route for the frame based on a first routing protocol. The method further includes, when the node does not contain a routing table entry for the frame destination, determining whether a route should be discovered for the frame destination, and when a route should not be discovered, determining a route for the frame based on a second routing protocol.

US Patent:

8429592, Apr 23, 2013

Filed:

Oct 20, 2011

Appl. No.:

13/277932

Inventors:

Yong Liu - Murphy TX, US
Keith R. Green - Prosper TX, US
Marie Denison - Plano TX, US
Yizhong Xie - Frisco TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 17/50

US Classification:

716136, 716115, 716132, 703 14

Abstract:

A process of operating a computer system to create a subcircuit model of an N/P configurable extended drain MOS transistor in which the subcircuit model includes an npn bipolar transistor and a pnp bipolar transistor which correspond to current paths through n-channel drift lanes and p-channel drift lanes during dual mode operation. A process of operating a computer system to simulate the behavior of an electronic circuit including a N/P configurable extended drain MOS transistor in which a subcircuit model of the N/P configurable extended drain MOS transistor includes an npn bipolar transistor and a pnp bipolar transistor which correspond to current paths through n-channel drift lanes and p-channel drift lanes during dual mode operation. A computer readable medium storing an electronic circuit simulation program that generates a simulation output of the behavior of an electronic circuit including a N/P configurable extended drain MOS transistor.

US Patent:

20100241413, Sep 23, 2010

Filed:

Mar 18, 2009

Appl. No.:

12/406423

Inventors:

Yong Liu - Murphy TX, US
Keith R. Green - Prosper TX, US
Sameer Pendharkar - Allen TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 17/50

US Classification:

703 14

Abstract:

A processor with a computer program product embodied thereon for modeling an LDMOS transistor having a drift region is provided. Characteristic behavior of a CMOS transistor with its body coupled to its source is generated, and characteristic behavior of a resistor is generated, where the resistor is coupled to the drain of the CMOS transistor. Then to account for impact ionization, an impact ionization current for electrons in the drift region an impact ionization current for holes in the drift region are calculated.

US Patent:

20140267607, Sep 18, 2014

Filed:

May 28, 2014

Appl. No.:

14/288623

Inventors:

- COLTS NECK NJ, US
Vidhya Seran - Irving TX, US
Yong Liu - Edison NJ, US

Assignee:

SPINELLA IP HOLDINGS, INC. - COLTS NECK NJ

International Classification:

H04N 13/00

US Classification:

348 43

Abstract:

A digital image processing system takes color plus Z channel data as input, preprocesses, decimates, and codes the Z channel in-band as digital watermark data embedded within the color data prior to encoding and transmission. A second digital image processing system receives, decodes, and extracts the decimated Z channel data before applying statistical regularization to restore a full-resolution Z channel prior to depth-image-based rendering.

US Patent:

20140269935, Sep 18, 2014

Filed:

May 28, 2014

Appl. No.:

14/288646

Inventors:

- Colts Neck NJ, US
Vidhya Seran - Irving TX, US
Yong Liu - Edison NJ, US

Assignee:

SPINELLA IP HOLDINGS, INC. - Colts Neck NJ

International Classification:

H04N 19/44

US Classification:

37524025

Abstract:

A digital image processing system takes color plus Z channel data as input, preprocesses, decimates, and codes the Z channel in-band as digital watermark data embedded within the color data prior to encoding and transmission. A second digital image processing system receives, decodes, and extracts the decimated Z channel data before applying statistical regularization to restore a full-resolution Z channel prior to depth-image-based rendering.