Zhi L Li from San Gabriel, CA, age 56

Us Patents

System, Method, And Computer Program Product For Determining Wall Thickness In Graphic Model
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US Patent:

7454319, Nov 18, 2008
Filed:

Nov 19, 2003
Appl. No.:

10/717273
Inventors:

Jun Wan - Cerritos CA, US
Chee-Keong Chong - Irvine CA, US
Zhi Li - Cypress CA, US
International Classification:

G06K 9/36
US Classification:

703 1, 382286
Abstract:

A system, method, and computer program product for measuring wall thickness. After an internal body topology of the model is generated, the topology is traversed between wall elements to determine wall thickness.

Looped Probe Design To Control Hybridization Stringency
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US Patent:

20050277128, Dec 15, 2005
Filed:

Dec 21, 2004
Appl. No.:

11/018545
Inventors:

Sukanta Banerjee - North Brunswick NJ, US
Michael Seul - Fanwood NJ, US
Alice Li - Ithaca NY, US
Kairali Podual - North Brunswick NJ, US
Chiu Chau - Edison NJ, US
Zhi Li - Irvington NY, US
International Classification:

C12Q001/68
G01N033/53
G01N033/553
US Classification:

435006000, 435007100, 436526000
Abstract:

The present invention provides a method for the generation of novel libraries of encoded magnetic particles from sub-libraries of by the generation of novel sub- libraries of magnetic nanoparticles and encoded particles. The sub-libraries are functionalized on demand are useful in the formation of arrays. The present invention is especially useful for performing multiplexed (parallel) assays for qualitative and/or quantitative analysis of binding interactions of a number of analyte molecules in a sample.

Multianalyte Molecular Analysis Using Application-Specific Random Particle Arrays
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US Patent:

20070231825, Oct 4, 2007
Filed:

May 3, 2007
Appl. No.:

11/743719
Inventors:

Sukanta Banerjee - Pennington NJ, US
Michael Seul - Fanwood NJ, US
Alice Li - Ithaca NY, US
Chiu Chau - Edison NJ, US
Zhi Li - Irvington NY, US
International Classification:

C12Q 1/68
US Classification:

435006000
Abstract:

The present invention provides methods and apparatus for the application of a particle array in bioassay format to perform qualitative and/or quantitative molecular interaction analysis between two classes of molecules (an analyte and a binding agent). The methods and apparatus disclosed herein permit the determination of the presence or absence of association, the strength of association, and/or the rate of association and dissociation governing the binding interactions between the binding agents and the analyte molecules. The present invention is especially useful for performing multiplexed (parallel) assays for qualitative and/or quantitative analysis of binding interactions of a number of analyte molecules in a sample.

Multianalyte Molecular Analysis Using Application-Specific Random Particle Arrays
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US Patent:

20080241936, Oct 2, 2008
Filed:

May 30, 2007
Appl. No.:

11/754558
Inventors:

Sukanta Banerjee - Pennington NJ, US
Michael Seul - Fanwood NJ, US
Alice X. Li - Ithaca NY, US
Chiu W. Chau - Edison NJ, US
Zhi Li - Irvington NY, US
International Classification:

G01N 35/00
US Classification:

436 43
Abstract:

The present invention provides methods and apparatus for the application of a particle array in bioassay format to perform qualitative and/or quantitative molecular interaction analysis between two classes of molecules (an analyte and a binding agent). The methods and apparatus disclosed herein permit the determination of the presence or absence of association, the strength of association, and/or the rate of association and dissociation governing the binding interactions between the binding agents and the analyte molecules. The present invention is especially useful for performing multiplexed (parallel) assays for qualitative and/or quantitative analysis of binding interactions of a number of analyte molecules in a sample.

System And Method For Predicting A Fault In A Real-Time Transport Protocol Packet Stream
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US Patent:

20090028056, Jan 29, 2009
Filed:

Jul 26, 2007
Appl. No.:

11/828618
Inventors:

MOSHIUR RAHMAN - MARLBORO NJ, US
ZHI LI - MARTINEZ CA, US
Assignee:

AT&T KNOWLEDGE VENTURES, L.P. - RENO NV
International Classification:

H04L 12/56
US Classification:

370242, 370390
Abstract:

A system that incorporates teachings of the present disclosure may include, for example, a monitoring system having a controller element to predict a fault in a video stream of real-time transport protocol (RTP) packets according to gaps in sequence numbers of said RTP packets. Other embodiments are disclosed.

System, Method, And Computer Program Product For Determining Wall Thickness In Graphic Model
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US Patent:

20090083007, Mar 26, 2009
Filed:

Sep 24, 2008
Appl. No.:

12/237193
Inventors:

Jun Wan - Cerritos CA, US
Chee-Keong Chong - Irvine CA, US
Zhi Li - Cypress CA, US
International Classification:

G06F 17/50
US Classification:

703 1
Abstract:

A system, method, and computer program product for measuring wall thickness. After an internal body topology of the model is generated, the topology is traversed between wall elements to determine wall thickness.

Method And System For Detecting A Fault Condition Based On Failed Igmp Join Attempts
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US Patent:

20090109859, Apr 30, 2009
Filed:

Oct 31, 2007
Appl. No.:

11/931956
Inventors:

Moshiur Rahman - Marlboro NJ, US
Zhi Li - Martinez CA, US
Assignee:

AT&T KNOWLEDGE VENTURES, LP - Reno NV
International Classification:

G06F 11/30
US Classification:

370242
Abstract:

A fault condition is detected based on determining that a number of failed Internet Group Management Protocol (IGMP) join attempts from at least one end device is greater than or equal to a threshold.

System And Method To Troubleshoot A Set Top Box Device
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US Patent:

20120054785, Mar 1, 2012
Filed:

Aug 31, 2010
Appl. No.:

12/872393
Inventors:

Paritosh Bajpay - Edison NJ, US
Zhi Li - San Ramon CA, US
David Lu - Morganville NJ, US
Balaji Puli - San Ramon CA, US
Raghvendra Savoor - Walnut Creek CA, US
Anthony Srdar - Dawsonville GA, US
Assignee:

AT&T INTELLECTUAL PROPERTY I, L.P. - Reno NV
International Classification:

H04H 60/32
US Classification:

725 16
Abstract:

A computer-implemented method includes receiving, at a monitoring center of a media distribution network, from a set top box device associated with a customer account, first error data indicating occurrence of a first error at the set top box device at a first time. The set top box device is at least partially functional after occurrence of the first error. The computer-implemented method includes receiving, at the monitoring center, second error data indicating occurrence of a second error at the set top box device at a second time. The set top box device is at least partially functional after occurrence of the second error. The computer-implemented method includes determining an elapsed time between the first time and the second time. The computer-implemented method includes automatically generating a trouble ticket indicating failure of the set top box device when the elapsed time satisfies a first threshold.

Resumes

Zhi Li Troy, MI

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Work:

Smoothies Technology, Inc
New York, NY
Sep 2014 to Feb 2015
Software Consultant Smart Team Global LLC

Sep 2013 to Sep 2014
Technical Consultant University of Detroit Mercy School of Dentistry

Sep 2012 to Aug 2013
Software Researcher

Education:

University of Detroit Mercy
May 2013
Master of Science in Software Engineering Chengdu University of Information Technology
Jun 2011
Bachelor of Science in Geography Information System

Zhi Yong Li Ridge, NY

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Work:

NJIT and Brookhaven National Lab

Jan 2009 to 2000
Research Assistant

Education:

New Jersey Institute of Technology
Newark, NJ
2009 to 2013
Ph.D in Electrical Engineering, VLSI and Solid State Device New Jersey Institute of Technology
Newark, NJ
2007 to 2008
M. S. in Electrical & Computer Engineering Beijing Institute of Technology
1984 to 1988
BSc in Electrical Engineering

Skills:

4 Years of X-ray semiconductor detector ASIC and board level design&test experience in Dr. Siddons Detector development group, Brookhaven National Lab. Specialized in the area of VLSI design, skilled at both analog and digital circuit ASIC design with Cadence virtuoso schematic, layout and simulation, Mentor Graphic schematic capture, IC station and HSPICE simulation; and VHDL/Verilog programming, Modsim simulation and Xilinx/Altera FPGA development. Specialized in the board level circuit design&test by using the Mentor Graphic board station and PADS for circuit and layout, PSPICE for simulation, various test instruments for design verification test and debug. Many years of circuit board level design in Lucent Technologies.