Zhu Y Zheng

US Patent:

59990198, Dec 7, 1999

Filed:

Oct 10, 1997

Appl. No.:

8/949216

Inventors:

Zhu Zheng - Stony Brook NY
Bradley S. Carlson - Huntington Station NY

Assignee:

The Research Foundation of State University of New York - Stony Brook NY

International Classification:

H03K 19096
H03K 1900
H03K 19094
H03K 1901

US Classification:

326 98

Abstract:

A CMOS Critical Voltage Transition Logic device which reduces propagation delays in a circuit by preconditioning the voltage outputs of each stage of the circuit to a critical voltage value which is between the logic high and logic low values for the circuit. The transition time to achieve either the high or low logic output states which is responsive to the input signal from the previous stage is reduced due to the preconditioning. Each stage is synchronously clocked in order to achieve the preconditioned state in each stage before processing the input signal for the previous stage. This unique switching characteristic greatly reduces the propagation delay in the circuit.