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Zu-Jean Tien

from Saratoga, CA

Zu-Jean Tien Phones & Addresses

  • Saratoga, CA
Name / Title
Company / Classification
Phones & Addresses
Zu-Jean Tien
President
EVERYBODY PITCH IN
20152 Kilbride Dr, Saratoga, CA 95070
20154 Kilbride Dr, Saratoga, CA 95070

Us Patents

  • Polyemitter Structure With Improved Interface Control

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  • US Patent:
    53744810, Dec 20, 1994
  • Filed:
    Aug 5, 1993
  • Appl. No.:
    8/102399
  • Inventors:
    Shwu Jen Jeng - Fishkill NY
    Jerzy Kanicki - Katonah NY
    David E. Kotecki - Hopewell Junction NY
    Christopher C. Parks - Beacon NY
    Zu-Jean Tien - Saratoga CA
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    H01L 2972
  • US Classification:
    428336
  • Abstract:
    A polyemitter structure having a thin interfacial layer deposited between the polysilicon emitter contact and the crystalline silicon emitter, as opposed to a regrown SiO. sub. x layer, has improved reproducibility and performance characteristics. A n-doped hydrogenated microcrystalline silicon film can be used as the deposited interfacial film between a crystalline silicon emitter and a polycrystalline silicon contact.
  • Low Temperature Emitter Process For High Performance Bipolar Devices

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  • US Patent:
    52665046, Nov 30, 1993
  • Filed:
    Mar 26, 1992
  • Appl. No.:
    7/857862
  • Inventors:
    Jeffrey L. Blouse - Stanfordville NY
    Jack O. Chu - Long Island NY
    Brian Cunningham - Highland NY
    Jeffrey P. Gambino - Gaylordsville CT
    Louis L. Hsu - Fishkill NY
    David E. Kotecki - Hopewell Junction NY
    Seshadri Subbanna - Hopewell Junction NY
    Zu-Jean Tien - Saratoga CA
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    H01L 21365
  • US Classification:
    437 31
  • Abstract:
    A method of manufacturing a bipolar transistor by use of low temperature emitter process is disclosed. After completion of the usual base and collector formation in a vertical bipolar transistor, an emitter opening is etched in the insulator layer over the base layer at selected locations. A thin layer (less than 500. ANG. ) of in-situ doped amorphous silicon is deposited over the substrate and heated to densify for 30 to 60 minutes at about 650. degree. C. Subsequently an in-situ doped polysilicon layer of 100 to 200 nm is deposited over the amorphous Si film preferably at about 600. degree. C. Subsequently the layers are heated below 600. degree. C. for several hours to convert partially the amorphous Si into a monocrystalline emitter layer over the base regions.

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