Andrew P Kisylia

US Patent:

57780749, Jul 7, 1998

Filed:

Jun 28, 1996

Appl. No.:

8/673437

Inventors:

Knute T. Garcken - Ventura CA
Charles E. Strawbridge - Camarillo CA
Andrew Philip Kisylia - Agoura Hills CA

Assignee:

Teledyne Industries, Inc. - Newbury Park CA

International Classification:

H04L 906

US Classification:

380 37

Abstract:

A system for generating variable substitution boxes from arbitrary keys for use in a block cipher system utilizes an initial set of linearly independent numbers to generate substitution tables. The initial set of linearly independent numbers is modulated with the bits of an arbitrary key through operations that result in final sets of linearly independent numbers to form the substitution tables. The system also includes an implementation which allows for rapid key changes for the crypto system by only generating portions of the substitution tables as needed for specific blocks of input data to be encrypted or decrypted,.

US Patent:

39887170, Oct 26, 1976

Filed:

Aug 6, 1975

Appl. No.:

5/602302

Inventors:

Andrew P. Kisylia - Agoura CA

Assignee:

Litton Systems, Inc. - Beverly Hills CA

International Classification:

G06F 100

US Classification:

3401725

Abstract:

A general purpose logic chip may be replicated for use to construct both the arithmetic unit and the control sections of a computer or other digital data processing or logic circuitry. The chip includes a number of features which when taken together permits its use for a wide variety of data processing functions, including as noted above, the basic arithmetic logic unit and associated functions in addition to micro-operational code control functions. The chip includes a 4-bit arithmetic unit and four registers associated with the arithmetic unit for handling inputs or outputs to and from the arithmetic logic unit. Mode code terminals are provided to implement micro-program control logic circuitry permitting several of the chips to operate on "bytes" or sets of bits of long digital numbers in parallel, without additional circuitry. A random access memory having 16 words, 4 bits each, is provided with alternative addressing circuits to be conveniently accessed either as a "first-in, last-out stack" or as a random access memory register file, or both. Required timing and control are developed within the chip and associated memories to minimize the need for special or additional control circuitry.

US Patent:

55833985, Dec 10, 1996

Filed:

Sep 15, 1994

Appl. No.:

8/306499

Inventors:

Harry A. Dellamano - Thousand Oaks CA
Andrew P. Kisylia - Agoura Hills CA

Assignee:

MagneTek, Inc. - Nashville TN

International Classification:

H05B 3702

US Classification:

315247

Abstract:

A preferred embodiment of the present invention provides a ballast circuit, comprising three sections: an input power section that receives a line AC signal as an input and provides a DC signal as an output; a pre-regulator section that conditions the DC signal; and a lamp driver section that drives a gas discharge lamp load. The pre-regulator section includes a transformer with an input winding, an output winding, and a current sense winding. The input winding receives the DC signal provided by the input power section. The output winding is connected in a flyback configuration with a flyback blocking diode, a bulk storage capacitor, and an output terminal for the conditioned DC signal. The current sense winding generates a signal proportional to the level of the transformer current. The transformer current is controlled by a flyback switch.