Abstract:
A network interface device minimizes access latency in initiating a DMA transfer request by selectively supplying a long bit comparison result, generated in a write controller configured for writing data into a buffer memory, directly to a read controller based on a determination that the buffer memory stores less than one complete frame. The media access controller determines the length of the data frame, and supplies the determined length to the write controller. The write controller compares the determined length to a prescribed threshold, and outputs a long bit value for storage in a buffer memory location contiguous with the stored data frame. The long bit can then be used to select a receive buffer threshold optimized for larger frames. If less than one complete frame is stored in the buffer memory, the write controller outputs the long bit information to the read controller, enabling the read controller to initiate a DMA transfer request, using a threshold selected based on the long-bit information, prior to storage of the complete data frame in the buffer memory.