Bin Wan - Sunnyvale CA, US Chia-Liang Lin - Union City CA, US
International Classification:
H04J003/06
US Classification:
370509000, 370357000
Abstract:
An interleaver or deinterleaver convolutionally interleaves or deinterleaves an incoming word sequence to form an outgoing word sequence. The interleaver or deinterleaver includes an external memory read and write accessed by a direct memory access controller for storing bytes forming words of the incoming word sequence until the bytes are needed to form words of the outgoing sequence. The interleaver uses a cache memory to store bytes of a next set of outgoing sequence words. The interleaver initially writes bytes of each incoming word to the external memory and also writes some bytes of the incoming words directly to the cache memory when they are to form parts of the outgoing sequence words currently stored in the cache memory. The interleaver transfers bytes from the main memory to the cache memory when the bytes are needed to form a next set of output sequence words. The deinterleaver stores bytes of incoming words in its cache memory until the cache memory is filled and then DMA transfers them to the external memory. The deinterleaver forms words of the output sequence from bytes it obtains from both its cache memory and its external memory.
Resumes
Principal Engineer And Manager, Bluetooth Digital Ip
Qualcomm
Senior Staff Engineer and Mgr, Bluetooth Digital Ip Design
Real Communications Jun 2002 - Aug 2012
Director of Ic Design
Integrated Telecom Express Feb 2001 - May 2002
Senior Asic Design Manager
Feb 2001 - May 2002
Principal Engineer and Manager, Bluetooth Digital Ip
Education:
Fudan University 1987 - 1990
Master of Science, Masters
Skills:
Asic Verilog Ic C++ Fpga Computer Architecture Dsp Simulation Algorithms Matlab Rtl Design C Architecture Static Timing Analysis Vhdl Soc Dft Vlsi Perl Ethernet Xilinx Usb Simulations Digital Signal Processors Debugging