David R Weaver

US Patent:

7065631, Jun 20, 2006

Filed:

Apr 9, 2002

Appl. No.:

10/120075

Inventors:

David L. Weaver - Emerald Hills CA, US

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F 9/38

US Classification:

712217

Abstract:

Virtual registers are mapped to architectural or physical registers according to a register map that is configurable with software. In one embodiment, only privileged software can configure the register map. In another embodiment, a portion of the register map is configurable with non-privileged software, and another portion is only configurable with privileged software. In yet another embodiment the register map is fully configurable by user software. The configurable register map provides backwards compatibility to code written for hardware-defined register mapping, while allowing flexible approaches to register mapping in code generated for a processor architecture using a software controllable register map.

US Patent:

20120216011, Aug 23, 2012

Filed:

Feb 18, 2011

Appl. No.:

13/030515

Inventors:

Darryl Gove - Sunnyvale CA, US
David Weaver - Emerald Hills CA, US

International Classification:

G06F 15/76
G06F 9/30

US Classification:

712 7, 712E09016

Abstract:

An apparatus, method, and medium for performing a vector operation on portions of one or more source vector registers. A vector unit performs an operation on the source vector registers and only stores results in the target vector register for elements which are selected by the vector operation mask. The vector operation mask can be read by the vector unit or loaded into the vector unit for each instruction cycle. The vector operation mask allows the vector unit to be used with partially filled source vector registers and eliminates the need for scalar operations to be performed on vector data.

US Patent:

20150046650, Feb 12, 2015

Filed:

Aug 6, 2013

Appl. No.:

13/960150

Inventors:

- Redwood City CA, US
David L. Weaver - Emerald Hills CA, US

Assignee:

Oracle International Corporation - Redwood City CA

International Classification:

G06F 12/08

US Classification:

711120, 711119

Abstract:

A processor having a streaming unit is disclosed. In one embodiment, a processor includes a streaming unit configured to load one or more input data streams from a memory coupled to the processor. The streaming unit includes an internal network having a plurality of queues configured to store streams of data. The streaming unit further includes a plurality of operations circuits configured to perform operations on the streams of data. The streaming unit is software programmable to operatively couple two or more of the plurality of operations circuits together via one or more of the plurality of queues. The operations circuits may perform operations on multiple streams of data, resulting in corresponding output streams of data.

US Patent:

20150046687, Feb 12, 2015

Filed:

Aug 6, 2013

Appl. No.:

13/960235

Inventors:

- Redwood City CA, US
David L. Weaver - Emerald Hills CA, US
Gerald Zuraski - Austin TX, US

Assignee:

Oracle International Corporation - Redwood City CA

International Classification:

G06F 9/30

US Classification:

712225

Abstract:

A processor having a streaming unit is disclosed. In one embodiment, a processor includes one or more execution units configured to execute instructions of a processor instruction set. The processor further includes a streaming unit configured to execute a first instruction of the processor instruction set, wherein executing the first instruction comprises the streaming unit loading a first data stream from a memory of a computer system responsive to execution of a first instruction. The first data stream comprises a plurality of data elements. The first instruction includes a first argument indicating a starting address of the first stream, a second argument indicating a stride between the data elements, and a third argument indicative of an ending address of the stream. The streaming unit is configured to output a second data stream corresponding to the first data stream.