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Dongping P Luo

age ~59

from Fremont, CA

Also known as:
  • Dong Ping Luo
  • Dong P Luo
  • Jiang D Luo
  • Luo Luo
  • Luo Dongping
  • Jiang D Dongping
  • Luo G
Phone and address:
239 Hunter Ln, Fremont, CA 94539

Dongping Luo Phones & Addresses

  • 239 Hunter Ln, Fremont, CA 94539
  • Oakland, CA
  • San Jose, CA
  • Milpitas, CA
  • Mountain View, CA
  • Cashmere, WA
  • Beaverton, OR
  • Alameda, CA

Work

  • Company:
    Juniper networks
    Apr 2004 to Oct 2006
  • Position:
    Senior asic design manager

Education

  • Degree:
    Master of Science, Masters
  • School / High School:
    Uc San Diego
    1993 to 1995
  • Specialities:
    Electronics Engineering

Skills

Network Security • Security

Industries

Computer & Network Security

Resumes

Dongping Luo Photo 1

Vice President

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Location:
Fremont, CA
Industry:
Computer & Network Security
Work:
Juniper Networks Apr 2004 - Oct 2006
Senior Asic Design Manager

Hillstone Networks, Inc. Apr 2004 - Oct 2006
Vice President

Netscreen Technologies Oct 1996 - Apr 2004
Senior Asic Designer
Education:
Uc San Diego 1993 - 1995
Master of Science, Masters, Electronics Engineering
Tsinghua University 1988 - 1990
Master of Science, Masters, Electronics Engineering
Tsinghua University 1983 - 1988
Bachelors, Bachelor of Science, Electronics Engineering
Skills:
Network Security
Security

Us Patents

  • Detection Of Corrupted Memory Pointers Within A Packet-Processing Device

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  • US Patent:
    7581163, Aug 25, 2009
  • Filed:
    Jun 1, 2006
  • Appl. No.:
    11/445369
  • Inventors:
    Aibing Zhou - Santa Clara CA, US
    Dongping Luo - Fremont CA, US
  • Assignee:
    Juniper Networks, Inc. - Sunnyvale CA
  • International Classification:
    G06F 11/00
  • US Classification:
    714805, 714819
  • Abstract:
    Techniques are described for detecting corruption of buffer pointers passed between a local processor and a remote processor on a network device. For example, the first processor, which may be a memory controller, receives and stores packets within memory. A second processor, such as a host processor for the network device, is coupled to the first processor by a bus. The first processor communicates a memory pointer associated with an a given packet to the second processor for processing of the packet, and maintains a backup copy of the memory pointer. Upon receiving the memory pointer back from the second processor, the first processor compares at least a portion of the memory pointer received from the second processor with an equivalent portion of the copy of the memory pointer to determine whether the received memory pointer has been corrupted.
  • Linked List Traversal With Reduced Memory Accesses

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  • US Patent:
    7600094, Oct 6, 2009
  • Filed:
    Jun 30, 2006
  • Appl. No.:
    11/427952
  • Inventors:
    Xiangdong Jin - Albany CA, US
    Dongping Luo - Fremont CA, US
    Wen Wei - San Jose CA, US
  • Assignee:
    Juniper Networks, Inc. - Sunnyvale CA
  • International Classification:
    G06F 9/26
    G06F 9/34
    G06F 17/00
  • US Classification:
    711216, 707100
  • Abstract:
    A linked list traversal system identifies when a linked list has become inefficient, either through attack or an undue multiplicity of collisions. A data unit is parsed to extract a key. A first hash result associated with the key is calculated based on a first hash function. A first linked list is identified based on the first hash result. It is determined whether the first linked list has been compromised. A second hash result associated with the key is calculated based on a second hash function when the first linked list has been compromised. A second linked list is established based on the second hash result, where the second hash result is different from the first hash result.
  • Firewall Including Local Bus

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  • US Patent:
    7784093, Aug 24, 2010
  • Filed:
    Feb 29, 2008
  • Appl. No.:
    12/040006
  • Inventors:
    Feng Deng - San Jose CA, US
    Yan Ke - San Jose CA, US
    Dongping Luo - Milpitas CA, US
  • Assignee:
    Juniper Networks, Inc. - Sunnyvale CA
  • International Classification:
    G06F 17/00
  • US Classification:
    726 11, 726 1, 726 12, 726 13, 726 14
  • Abstract:
    A gateway for screening packets transferred over a network. The gateway includes a plurality of network interfaces, a memory and a memory controller. Each network interface receives and forwards messages from a network through the gateway. The memory temporarily stores packets received from a network. The memory controller couples each of the network interfaces and is configured to coordinate the transfer of received packets to and from the memory using a memory bus. The gateway includes a firewall engine coupled to the memory bus. The firewall engine is operable to retrieve packets from the memory and screen each packet prior to forwarding a given packet through the gateway and out an appropriate network interface. A local bus is coupled between the firewall engine and the memory providing a second path for retrieving packets from memory when the memory bus is busy.
  • Linked List Traversal With Reduced Memory Accesses

    view source
  • US Patent:
    7930516, Apr 19, 2011
  • Filed:
    Aug 31, 2009
  • Appl. No.:
    12/551066
  • Inventors:
    Xiangdong Jin - Albany CA, US
    Dongping Luo - Fremont CA, US
    Wen Wei - San Jose CA, US
  • Assignee:
    Juniper Networks, Inc. - Sunnyvale CA
  • International Classification:
    G06F 13/00
    G06F 13/28
    G06F 7/00
    G06F 17/30
  • US Classification:
    711216, 711E12002, 707800
  • Abstract:
    A linked list traversal system identifies when a linked list has become inefficient, either through attack or an undue multiplicity of collisions. A data unit is parsed to extract a key. A first hash result associated with the key is calculated based on a first hash function. A first linked list is identified based on the first hash result. It is determined whether the first linked list has been compromised. A second hash result associated with the key is calculated based on a second hash function when the first linked list has been compromised. A second linked list is established based on the second hash result, where the second hash result is different from the first hash result.
  • Session-Based Sequence Checking

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  • US Patent:
    7990861, Aug 2, 2011
  • Filed:
    Apr 3, 2006
  • Appl. No.:
    11/278475
  • Inventors:
    Xiangdong Jin - Albany CA, US
    Dongping Luo - Fremont CA, US
  • Assignee:
    Juniper Networks, Inc. - Sunnyvale CA
  • International Classification:
    G01R 31/08
    G01F 11/00
    G08C 15/00
    H04J 1/16
    H04J 3/14
    H04L 1/00
    H04L 12/26
    G06F 15/16
  • US Classification:
    370231, 370229, 3702301, 370235, 709235
  • Abstract:
    A device may include logic configured to receive a data unit intended for a destination device and to obtain information from the data unit. The logic may be configured to identify a window using the obtained information, where the window has a range determined by a lower boundary and an upper boundary. The logic may be configured to forward the data unit to the destination device when a portion of the data unit information is within the window.
  • Instruction Extension For Linked List Lookup

    view source
  • US Patent:
    8001524, Aug 16, 2011
  • Filed:
    Jul 19, 2006
  • Appl. No.:
    11/458589
  • Inventors:
    Wen Wei - San Jose CA, US
    Dongping Luo - Fremont CA, US
    Lidong Zhao - San Jose CA, US
  • Assignee:
    Juniper Networks, Inc. - Sunnyvale CA
  • International Classification:
    G06F 9/44
  • US Classification:
    717114
  • Abstract:
    A system uses software to perform a first portion of a linked list traversal process, where the first portion obtains a pointer that corresponds to a key and where the pointer points into a linked list. The system further uses hardware and the obtained pointer to perform a second portion of the linked list traversal process, where the second portion locates data from the linked list that is associated with the key.
  • Firewall Including Local Bus

    view source
  • US Patent:
    8490158, Jul 16, 2013
  • Filed:
    Jul 15, 2010
  • Appl. No.:
    12/837271
  • Inventors:
    Feng Deng - San Jose CA, US
    Yan Ke - San Jose CA, US
    Dongping Luo - Milpitas CA, US
  • Assignee:
    Juniper Networks, Inc. - Sunnyvale CA
  • International Classification:
    G06F 17/00
  • US Classification:
    726 2, 726 3, 726 11, 726 12, 726 13
  • Abstract:
    A gateway for screening packets transferred over a network. The gateway includes a plurality of network interfaces, a memory and a memory controller. Each network interface receives and forwards messages from a network through the gateway. The memory temporarily stores packets received from a network. The memory controller couples each of the network interfaces and is configured to coordinate the transfer of received packets to and from the memory using a memory bus. The gateway includes a firewall engine couples to the memory bus. The firewall engine is operable to retrieve packets from the memory and screen each packet prior to forwarding a given packet through the gateway and out an appropriate network interface. A local bus is coupled between the firewall engine and the memory providing a second path for retrieving packets from memory when the memory bus is busy.
  • Firewall Including Local Bus

    view source
  • US Patent:
    7363653, Apr 22, 2008
  • Filed:
    Jan 26, 2004
  • Appl. No.:
    10/765677
  • Inventors:
    Feng Deng - San Jose CA, US
    Yan Ke - San Jose CA, US
    Dongping Luo - Milpitas CA, US
  • Assignee:
    Juniper Networks, Inc. - Sunnyvale CA
  • International Classification:
    G06F 9/00
  • US Classification:
    726 11, 726 12, 726 1
  • Abstract:
    A gateway for screening packets transferred over a network. The gateway includes a plurality of network interfaces, a memory and a memory controller. Each network interface receives and forwards messages from a network through the gateway. The memory temporarily stores packets received from a network. The memory controller couples each of the network interfaces and is configured to coordinate the transfer of received packets to and from the memory using a memory bus. The gateway includes a firewall engine coupled to the memory bus. The firewall engine is operable to retrieve packets from the memory and screen each packet prior to forwarding a given packet through the gateway and out an appropriate network interface. A local bus is coupled between the firewall engine and the memory providing a second path for retrieving packets from memory when the memory bus is busy.

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