This is a semiconductor chip package configuration particularly suited for stacking. These described arrangement is especially adapted to be used with the so-called Lead-On-Chip type package. Each package is of minimum size, and provided with a thermal heat sink arranged with respect to the remainder of the package to balance the stresses induced in the package during fabrication. This is accomplished by placing a lead frame on the active face of the semiconductor chip, bonding the lead frame conductors to respective input/output pads on the active face of the chip, and molding an encapsulant completely around five of the six sides of the chip but leaving a substantial portion of the sixth side unencapsulated. A heat sink is affixed on the exposed, i. e. unencapsulated, portion of the sixth side of the chip.
Douglas Wallace Phelps - Burlington VT Edward John Dombroski - Jericho VT William Carroll Ward - Burlington VT
International Classification:
H01L 23495
US Classification:
257668
Abstract:
A platform serves to carry an integrated circuit chip (20) for handling and alignment through wire bonding or TAB operations, provides interconnections, and supports the IC chip in its use environment. The platform base (10) has a flat portion which may have a slot (30) passing through it and extending approximately the length of an IC chip (which has wire-bond pads (140), some of which may be near a chip axis). The IC chip is mounted to the platform base with tape (50), which provides at least one adhesive surface. The tape may be a cast or contained adhesive or epoxy with or without a backing layer, or it may be a thermoplastic or thermo-setting plastic. TAB or wire-bond pads are aligned with respect to the platform slot. If the chip has more than one row of wire-bond pads, the platform may have more than one slot. If more than one chip is mounted to the platform, the platform's base may have one or more slots (30, 40) per chip.
Douglas Wallace Phelps - Burlington VT Edward John Dombroski - Jericho VT William Carroll Ward - Burlington VT
International Classification:
H01L 23495
US Classification:
257668
Abstract:
A platform carries an integrated circuit (IC) (20) for handling and alignment through wire bonding operations, provides interconnections, and supports the shielded IC with uniform, controlled adhesive thickness. The platform base (10) has a flat portion which may have a slot (30) extending the length of a chip with wire-bond pads (140). The IC is mounted to the platform base with cast or contained adhesive, epoxy, or tape (50), which provides at least one adhesive surface. For several rows of wire-bond pads, there may be several slots. If the platform carries more than one chip, the platform base may have one or more slots (30, 40) per chip. A platform may carry other components (110, 120). Circuitry (90) may be printed on one or both sides of the platform base, with moderate resistivity to damp ringing of noise signals. Wire bonds are made through the slot (30), connecting IC pads with circuitry.
Douglas Wallace Phelps - Burlington VT Edward John Dombroski - Jericho VT William Carroll Ward - Burlington VT
International Classification:
H01L 2304 H01L 23495
US Classification:
257698
Abstract:
A platform carries an integrated circuit (IC) (20) for handling and alignment through wire bonding or TAB operations, provides interconnections, and supports the shielded IC with uniform, controlled adhesive thickness. The platform base (10) has a flat portion which may have a slot (30) extending the length of a chip with wire-bond pads (140). The IC is mounted to the platform base with cast or contained adhesive, epoxy, or tape (50), which provides at least one adhesive surface. For several rows of wire-bond pads, there may be several slots. If the platform carries more than one chip, the platform base may have one or more slots (30, 40) per chip. A platform may carry other components (110, 120). Circuitry (90) may be printed on one or both sides of the platform base, with moderate resistivity to damp ringing of noise signals. Wire bonds are made through the slot (30), connecting IC pads with circuitry.
James A. Bilowith - Colchester VT Edward J. Dombroski - Jericho VT William H. Guthrie - Essex Junction VT Richard W. Noth - Fairfax VT
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 2312 H01L 2348 H01L 2302
US Classification:
357 80
Abstract:
Multiple, single conductor, tape automated bonding (TAB) tapes are sequentially applied to a semiconductor device by the bonding of a first, etched, single layer TAB tape to an outer row of bonding pads on a semiconductor chip and to selected contacts on a lead frame followed by the laying down of at least one additional etched, single layer TAB tape which is then bonded to an inner row of bonding pads on the semiconductor chip and to different selected lead frame contacts. If desired the subsequent TAB tape may be adhered to the preceding TAB tape to increase the mechanical strength of all the tapes and improve the electrical characteristics of the tapes. The application of one or more ground planes to the assembly is also shown.
Douglas Wallace Phelps - Burlington VT Edward John Dombroski - Jericho VT William Carroll Ward - Burlington VT
International Classification:
H01L 2160
US Classification:
437209
Abstract:
An integrated-circuit manufacturing process uses a platform to carry an integrated circuit (IC) (20) for handling and alignment through wire bonding or TAB operations, to provide interconnections, and to support the shielded IC with uniform, controlled adhesive thickness. The platform base (10) has a flat portion which may have a slot (30) extending the length of a chip with wire-bond pads (140). The IC is mounted to the platform base with cast or contained adhesive, epoxy, or tape (50), which provides at least one adhesive surface. For several rows of wire-bond pads, there may be several slots. If the platform carries more than one chip, the platform base may have one or more slots (30, 40) per chip. A platform may carry other components (110, 120). Circuitry (90) may be printed on one or both sides of the platform base, with moderate resistivity to damp ringing of noise signals.
This is a semiconductor chip package configuration particularly suited for stacking. These described arrangement is especially adapted to be used with the so-called Lead-On-Chip type package. Each package is of minimum size, and provided with a thermal heat sink arranged with respect to the remainder of the package to balance the stresses induced in the package during fabrication. This is accomplished by placing a lead frame on the active face of the semiconductor chip, bonding the lead frame conductors to respective input/output pads on the active face of the chip, and molding an encapsulant completely around five of the six sides of the chip but leaving a substantial portion of the sixth side unencapsulated. A heat sink is affixed on the exposed, i. e. unencapsulated, portion of the sixth side of the chip.
A.o Sherman
General Manager
Ibm Feb 1967 - Feb 1994
Semiconductor Packaging Engineer
Smugglers' Notch Resort Feb 1967 - Feb 1994
Professional Ski Instructor and Hiking Guide
Ge Jun 1960 - Feb 1967
Equipment Development Engineer
Education:
Thunderbird School of Global Management 1977 - 1978
Skills:
Ski
Professional Ski Instructor And Hiking Guide At Smugglers' Notch Resort
Edward Dombroski 1998 graduate of Schenectady High School in Schenectady, NY is on Classmates.com. Get caught up with Edward and other high school alumni ...