Feng Zhou - Austin TX, US Ko-Min Chang - Austin TX, US Cheong Min Hong - Austin TX, US
International Classification:
H01L 45/00 H01L 21/8239
US Classification:
257 2, 438104, 257E45003, 257E21004, 257E21645
Abstract:
A resistive random access memory cell over a substrate includes a memory stack structure and a sidewall spacer. The memory stack structure is over the substrate and includes a first electrode layer, a second electrode layer, and a metal oxide layer between the first electrode layer and the second electrode layer. The metal oxide layer has a sidewall. The sidewall spacer is adjacent to the sidewall and has a composition including silicon, carbon, and nitrogen.
Resistive Random Access Memory (Ram) Cell And Method For Forming
Feng Zhou - Austin TX, US Ko-Min Chang - Austin TX, US Cheong Min Hong - Austin TX, US
International Classification:
H01L 45/00 H01L 21/02
US Classification:
257 4, 438382, 257E45002, 257E21004
Abstract:
A resistive random access memory cell uses a substrate and includes a gate stack over the substrate. The gate stack includes a first copper layer over the substrate, a copper oxide layer over the first copper layer, and a second copper layer over the copper oxide layer.
CHEONG Min HONG - Austin TX, US Ko-Min Chang - Austin TX, US Feng Zhou - Austin TX, US
International Classification:
H01L 45/00 H01L 21/8239
US Classification:
257 2, 438104, 257E45003, 257E21645, 257E21004
Abstract:
A resistive random access memory (ReRAM) includes a first metal layer having a first metal and a metal-oxide layer on the first metal layer. The metal-oxide layer inlcudes the first metal. The ReRAM further includes a second metal layer over the metal-oxide layer and a first continuous conductive barrier layer in physical contact with sidewalls of the first metal layer and of the metal-oxide layer.
Feng Zhou - Austin TX, US Ko-Min Chang - Austin TX, US Cheong Min Hong - Austin TX, US
International Classification:
H01L 45/00
US Classification:
257 2, 438381, 257 1, 257E45002
Abstract:
A resistive random access memory (ReRAM) cell, comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes a second conductive electrode over the dielectric storage material layer and an interface region comprising a plurality of interspersed field focusing features that are not photo-lithographically defined. The interface region is located between the first conductive electrode and the dielectric storage material layer or between the dielectric storage material layer and the second conductive electrode.
Feng Zhou - Austin TX, US Ko-Min Chang - Austin TX, US Cheong Min Hong - Austin TX, US
International Classification:
H01L 45/00
US Classification:
257 2, 438381, 257 1, 257E45002
Abstract:
A resistive random access memory (ReRAM) cell comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes a second conductive electrode over the dielectric storage material layer and a layer of conductive nanoclusters () including a plurality of nanoclusters in contact with the dielectric storage material layer and in contact with the first conductive electrode or the second conductive electrode.
Circuitry Including Resistive Random Access Memory Storage Cells And Methods For Forming Same
Peter J. Kuhn - Austin TX, US Feng Zhou - Austin TX, US
Assignee:
FREESCALE SEMICONDUCTOR, INC. - Austin TX
International Classification:
G11C 11/00 H01L 21/66
US Classification:
365148, 438 17, 257E21004, 257E21521
Abstract:
A method of forming a circuitry includes providing a substrate comprising a plurality of die. Each die includes a plurality of resistive random access memory (RRAM) storage cells. The method further includes concurrently initializing substantially all of the RRAM storage cells on the same wafer. Initializing can include applying a voltage potential across the RRAM storage cells.
CHEONG MIN HONG - Austin TX, US Feng Zhou - Austin TX, US
International Classification:
G11C 11/00 H01L 47/00
US Classification:
365148, 257 2, 257E47001
Abstract:
A resistive random access memory (ReRAM) device can comprise a first metal layer and a first metal-oxide layer on the first metal layer. The first metal-oxide layer comprises the first metal. A second metal layer can comprise a second metal over and in physical contact with the first metal-oxide layer. A first continuous non-conductive barrier layer can be in physical contact with sidewalls of the first metal layer and sidewalls of the first metal-oxide layer. A second metal-oxide layer can be on the second metal layer. The second metal-oxide layer can comprise the second metal layer. A third metal layer can be over and in physical contact with the second metal-oxide layer. The first and second metal-oxide layers, are further characterized as independent storage mediums.
Power Device Assemblies And Cooling Devices For Cooling Heat- Generating Devices
A power device assembly includes a heat-generating device, one or more porous bonding layers, and one or more cap layers. The one or more porous bonding layers are formed on a surface of the heat-generating device and define a plurality of embedded vapor channels. The one or more cap layers are engaged with a porous bonding layer of the one or more porous bonding layers opposite the heat-generating device. The one or more cap layer comprise a plurality of liquid feed channels for feeding cooling fluid to the heat-generating device via the porous bonding layer.