Hong Yaqiang W Jiang

US Patent:

6349007, Feb 19, 2002

Filed:

Jul 25, 2001

Appl. No.:

09/682127

Inventors:

Hong Jiang - Milpitas CA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 2736

US Classification:

360 31, 360 46, 360 67, 360313

Abstract:

A circuit ( ) for detecting a fault in a magneto-resistive head ( ) includes a transconductance amplifier ( ) having an input across which the head ( ) is connected. A circuit ( ) for determining a ratio of a current in the head, I , to a variable control current, I , is applied to maintain a substantially constant voltage at an output of the transconductance amplifier ( ). The current, I , in the head is a function of the variable control current, I , The circuit for determining a ratio of a current, I , flowing in the head ( ) to the variable control current, I , comprises first ( ) and ( ) second current mirrors, the first current mirror ( ) mirroring the current flowing in the head ( ), and the second current mirror ( ) mirroring the variable control current, I , Circuitry ( ) is provided that triggers fault indicating output signals if the ratio falls outside a predetermined range.

US Patent:

6487034, Nov 26, 2002

Filed:

Jun 8, 2001

Appl. No.:

09/681811

Inventors:

Hong Jiang - Milpitas CA
James Nodar - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 502

US Classification:

360 68, 360 31, 360 66, 369 5342, 340652

Abstract:

A circuit ( ) and method are provided for generating a signal ( ) indicating an open impedance fault of a coil ( ) of a write head ( ) of a mass data storage device ( ). The circuit ( ) includes a differential amplifier ( ) with the electrical component ( ) being connected as a load in a first leg thereof. An impedance element ( ) is provided in a second leg of the differential amplifier ( ), and a pair of bipolar transistors ( ) are respectively connected in the first and second legs. The pair of bipolar transistors ( ) have a constant bias voltage (Bias) applied to inputs thereof, and an output circuit is connected to an output node of the first leg of the differential amplifier ( ).

US Patent:

6538832, Mar 25, 2003

Filed:

Jun 7, 2000

Appl. No.:

09/589429

Inventors:

Indumini W. Ranmuthu - Plano TX
Hong Jiang - Plano TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 509

US Classification:

360 46, 360 67, 360 63

Abstract:

In hard disk drives (HDD), a magnetic read head moves over a portion of the hard disk when reading data. A preamplifier, having an initial amplification stage of the single ended type, connects to the magnetic read head and amplifies a data signal picked up by the magnetic read head. The preamplifier typically has multiple read heads, or channels. In order to reduce noise coming into the read channels of the preamplifier from the substrate capacitances of the input transistors connected to the read heads, the input transistors are grouped together into multiple banks that are multiplexed, or turn on separately. To further aid noise reduction, the poles of the single ended amplifier are matched, that is, the frequency response of the constant voltage side is matched to the frequency response to the signal side. This effectively reduces both ground noise and Vcc power supply noise as the the noise becomes common mode on the inputs to a differential amplifier that is connected to the single ended amplifier. Noise is further minimized by connecting the substrates of the switching transistors connected to the input transistors to magnetic read ground, as opposed to integrated circuit ground.

US Patent:

6621649, Sep 16, 2003

Filed:

Nov 10, 2000

Appl. No.:

09/709699

Inventors:

Hong Jiang - Plano TX
Indumini Ranmuthu - Plano TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 502

US Classification:

360 67, 360 46

Abstract:

The present invention relates to a preamplifier circuit comprising a plurality of amplifier stages coupled together and operable to consecutively amplify a signal associated with a head of a hard disk drive. The preamplifier circuit further comprises a power delivery circuit operably coupled to the amplifier stages and operable to provide power to the amplifier stages in a substantially concurrent manner when the hard disk drive is transitioning from a write state to a read state. In addition, the circuit comprises a control circuit operably coupled to the amplifier stages, and operable to activate at least two of the plurality of amplifier stages in a generally consecutive manner after the providing of power to the amplifier stages. In the above manner a saturation of an output of the preamplifier circuit is avoided by preventing substantially a propagation of glitches through the preamplifier circuit and providing for a substantially fast write-to-read transition time.

US Patent:

6687064, Feb 3, 2004

Filed:

Jul 21, 2000

Appl. No.:

09/621107

Inventors:

Hong Jiang - Plano TX
Paul Merle Emerson - Murphy TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 509

US Classification:

360 31, 360 68, 360 46, 369 5342, 340652

Abstract:

A circuit ( ) and method for detecting faults of a write head ( ) of a hard-disk drive system ( ). A first resistor R and a second resistor R are coupled to coil L of write head ( ). A transistor Q is coupled to a common node of resistor R and R. Current I is applied to the coil L, and voltages V and V across the nodes at either end of resistors R and R are analyzed in order to detect faults on write head coil L. The detection is performed during a quiet mode of the hard-disk drive system ( ), so the fault detection is frequency-independent. Open faults are distinguishable from short-to-ground faults by the write fault detection circuit ( ).

US Patent:

6707629, Mar 16, 2004

Filed:

Jun 30, 2000

Appl. No.:

09/608896

Inventors:

Hong Jiang - Plano TX
Paul Merle Emerson - Murphy TX
Bryan E. Bloodworth - Irving TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 509

US Classification:

360 67, 360 68

Abstract:

A digital temperature monitor (DTM ( ) includes a proportional-to-absolute temperature (PTAT) sensor ( ) and reference circuit ( ) coupled to the inputs of a comparator ( ). The DTM ( ) monitors the temperature of adjacent and/or proximate integrated circuitry. The method includes the steps of providing a reference signal to the comparator ( ), increasing the reference signal voltage, and determining the temperature of an integrated circuit by determining when the reference signal is greater than the PTAT sensor ( ) output voltage. The DTM ( ) may be implemented as part of a hard-disk drive preamplifier circuit ( ).

US Patent:

6724556, Apr 20, 2004

Filed:

Jun 29, 2001

Appl. No.:

09/896387

Inventors:

Indumini W. Ranmuthu - Plano TX
Hong Jiang - Santa Clara CA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 503

US Classification:

360 66, 360 67, 360 46

Abstract:

A differential circuit to read differential data from a disk by a voltage bias includes a read circuit having a read circuit pole to read the differential data from the disk by maintaining the voltage bias and a feedback circuit having a feedback pole to sense deviations in the voltage and to adjust the voltage in response to the deviations. The read circuit pole is separated from the feedback pole in frequency.

US Patent:

6775078, Aug 10, 2004

Filed:

Sep 14, 2001

Appl. No.:

09/952952

Inventors:

Hong Jiang - Milpitas CA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 503

US Classification:

360 46, 360 66, 360 67, 360 75, 324210, 324212

Abstract:

A circuit and method are presented for detecting a fault in a magneto-resistive head ( ). The circuit includes a bias circuit ( ) to produce a bias voltage across the head ( ) and a pair of resistors ( ) in series with the head ( ) connected to the bias circuit ( ) to carry a current (I ) from the bias circuit ( ) in common with the head. A circuit ( ) is provided to determine a ratio of a voltage across the head ( ) with respect to a voltage across the head ( ) and the pair of resistors ( ), and a circuit ( ) is provided for indicating a fault if the ratio falls outside a predetermined range.