James A Heaton

Address:

10887 Avenida De Los Lobos, San Diego, CA 92127

Phone:

(858)4862189

VIN:

JTDKN3DU6B0293737

Make:

TOYOTA

Model:

PRIUS

Year:

2011

US Patent:

20050068992, Mar 31, 2005

Filed:

Sep 24, 2004

Appl. No.:

10/949500

Inventors:

Vicky Kaku - San Diego CA, US
James Heaton - Ramona CA, US

International Classification:

H04L012/56

US Classification:

370535000

Abstract:

The present method and apparatus provide high-speed data multiplexing of telecommunications data signals. In one of many possible embodiments, an apparatus provides for high-speed multiplexing of Motion Picture Experts Group (MPEG) transport streams in a cable network. The apparatus includes an input interface, a demultiplexer, and an output interface. The input interface is configured to receive a number of transport streams carrying programming services. The demultiplexer is configured to access user-defined logic and to generate the internal transport streams based on the user-defined logic. The demultiplexer is further configured to add the programming services to at least one of the internal transport streams based on the user-defined logic. The output interface is configured to output the internal transport streams.

US Patent:

20080025395, Jan 31, 2008

Filed:

Jul 27, 2006

Appl. No.:

11/460341

Inventors:

Robert S. Nemiroff - Carlsbad CA, US
Chanchal Chatterjee - San Diego CA, US
Robert O. Eifrig - San Diego CA, US
Michael A. Grossman - San Diego CA, US
Vicky B. Kaku - San Diego CA, US
James R. Heaton - Ramona CA, US

Assignee:

GENERAL INSTRUMENT CORPORATION - Horsham PA

International Classification:

H04N 7/12

US Classification:

37524012, 37524026

Abstract:

Method and apparatus for motion estimation in a video encoder is described. In one example, a motion estimator includes registers, first-in-first out (FIFO) logic, costing logic, and processing logic. The registers are configured to store an even field and an odd field of a current macroblock pair in a current frame in a video stream. The FIFO logic is configured to store a reference window of a reference frame in the video stream. The costing logic is configured to produce cost data. The processing logic is coupled to the registers, the FIFO logic, and the costing logic. The processing logic is configured to generate common sums of absolute differences (SADs) for the current macroblock pair, generate SADs for partitions of the current macroblock pair from combinations of the common SADs, and cost and minimize the SADs for the partitions.