Jin J Liang

US Patent:

6637641, Oct 28, 2003

Filed:

May 6, 2002

Appl. No.:

10/139500

Inventors:

Stuart D. Downes - Milford MA
Jin Liang - Southborough MA

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

B23K 308

US Classification:

228102, 2282481, 228 23, 228 35, 228 41, 228 43

Abstract:

A circuit board manufacturing system has a paste source, a circuit board processing apparatus, and a controller. The circuit board processing apparatus includes a carrier configured to receive a circuit board having (i) a section of circuit board material and (ii) virgin metallic surface mount pads supported by the section of circuit board material. The circuit board processing apparatus further includes a paste distribution assembly coupled to the carrier and to the paste source. The paste distribution assembly is configured to dispose a paste from the paste source onto a surface of the circuit board. The carrier further includes a surfacing assembly coupled to the carrier. The surfacing assembly is configured to move the paste over the surface of the circuit board to remove a portion of each virgin metallic surface mount pad. The controller is configured to selectively start and stop operations of the paste distribution and surfacing assemblies.

US Patent:

6845556, Jan 25, 2005

Filed:

Mar 20, 2002

Appl. No.:

10/102460

Inventors:

Jin Liang - Southborough MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

H05K 334

US Classification:

29840, 29764, 29827, 29839, 29890128, 2281801, 228191, 257666, 439876

Abstract:

Circuit board reworking techniques involve removing original solder from the metallic pad, removing an outer portion of the metallic pad to expose an inner portion of the metallic pad, and applying new solder to the metallic pad. Removal of the original solder and the outer portion of the metallic pad exposes the inner portion which has non-corroded and non-contaminated metal. The application of new solder to this inner portion of the pad enables wettability of the pad as well as provides a protective coating to prevent corrosion of the inner portion (e. g. , oxidation, reaction with contaminants, etc. ). Accordingly, circuit board abnormalities such as “Black Pad” defects can be cured.

US Patent:

7159758, Jan 9, 2007

Filed:

Jun 26, 2003

Appl. No.:

10/607400

Inventors:

Stuart D. Downes - Milford MA, US
Larry Norris - Boston MA, US
Jin Liang - Southborough MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

B23K 31/02

US Classification:

2282481

Abstract:

A circuit board processing system has a circuit board fabrication stage configured to fabricate a circuit board having a set of circuit board pads, and a solder fusing stage coupled to the circuit board fabrication stage. The solder fusing stage is configured to (i) apply flux and solder concurrently to the set of circuit board pads, and (ii) activate the flux and melt the solder to form a set of substantially flat solder coatings which is fused to the set of circuit board pads. The circuit board processing system further includes a washing stage coupled to the solder fusing stage. The washing stage is configured to remove contamination from a surface of the circuit board having the circuit board pads and from the set of substantially flat solder coatings which is fused to the set of circuit board pads. Such a system is well-suited for lead-free solder.

US Patent:

7416106, Aug 26, 2008

Filed:

Sep 29, 2003

Appl. No.:

10/674080

Inventors:

Stuart D. Downes - Milford MA, US
Jin Liang - Southborough MA, US
Larry Norris - Quincy MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

B23K 31/02

US Classification:

22818021, 228215, 2282481

Abstract:

A technique for processing a circuit board involves placing a mask layer on the circuit board, where the mask layer defines a set of pad profiles for a component mounting location. Each pad profile has a set of rounded corners. The technique further involves forming, for each pad profile, a soldering pad having a set of radii corresponding to the set of rounded corners of that pad profile to create a set of soldering pads for the component mounting location. Each soldering pad is configured for a high bond strength solder joint. The technique further involves removing the mask layer from the circuit board and soldering a component to the component mounting location. This technique is well-suited for robustly mounting the component to the circuit board at solder joints with relatively high solder joint bond strengths.

US Patent:

7626237, Dec 1, 2009

Filed:

Jun 26, 2007

Appl. No.:

11/768648

Inventors:

Nader G. Dariavach - Middleboro MA, US
Jin Liang - Southborough MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

H01L 29/78

US Classification:

257415, 257213, 257418

Abstract:

A memory cell for storing a bit having one of two logic states. The memory cell includes a structure comprises a pair of electrically conductive shape memory alloy members separated by a dielectric. An electrical circuit applies a current pulse at a first time to the first electrically conductive member to place the structure is a first position corresponding to one of the two logic states and for applying a current pulse at a different time to change the position of the structure from the first position to a different position, such different position corresponding to a different one of the two logic states. Output circuitry is provided for detecting the logic state of the bit stored by the memory cell, such output circuitry comprising a position sensor for detecting whether the structure is in the first position or in the second position.

US Patent:

8551263, Oct 8, 2013

Filed:

Dec 15, 2009

Appl. No.:

12/638617

Inventors:

Nader Dariavach - Middleboro MA, US
Jin Liang - Southborough MA, US
Gordon Barr - Fall River MA, US
Paul Callahan - Acton MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

C22F 1/02
C22F 1/16

US Classification:

148512, 148528

Abstract:

A method of reducing whisker growths includes identifying a solder connection to be treated. The solder connection may contain one or more whisker growths. A heat source is applied at a defined temperature to the solder connection for a defined period of time sufficient to melt at least a portion of the one or more whisker growths. The heat source is removed from the solder connection prior to the melting of the solder connection.

US Patent:

8577595, Nov 5, 2013

Filed:

Jul 17, 2008

Appl. No.:

12/218765

Inventors:

Yang Zhao - Andover MA, US
Jin Liang - Southborough MA, US

Assignee:

Memsic, Inc. - Andover MA

International Classification:

G01M 17/00
G01C 21/26

US Classification:

701408, 701 323, 701410, 382103, 382106

Abstract:

A device, system, and method for generating location and path-map data for displaying a location and path-map is disclosed. The device includes a first set of sensors for generating a plurality of first data signals with respect to an attitude of an object; a second set of sensors for generating a plurality of second data signals with respect to the attitude of the object; an imaging device for generating a plurality of third data signals that include a most significant feature, which is disposed in at least two images of the imaging device; and at least one processing device that is adapted to calculate a heading direction (bearing) of the device using the plurality of first data signals and the plurality of second data signals; to calculate a distance traveled along the heading direction using the plurality of third data signals; and to translate the calculated heading direction and calculated distance traveled into a leg or portion of a leg of a path-map for visual display on a two- or three-dimensional system.

US Patent:

20120111190, May 10, 2012

Filed:

Nov 8, 2010

Appl. No.:

12/942017

Inventors:

Nader Dariavach - Middleboro MA, US
Francis W. French - Harvard MA, US
Jin Liang - Southborough MA, US
Joseph A. Ziehler - Carlisle MA, US

International Classification:

B01D 46/46

US Classification:

95 10, 96397

Abstract:

A closed loop air handling system for monitoring and cleaning air from corrosive contaminants. Commonly occurring corrosive elements found in air can react in combination together and with other environmental conditions to increase the propensity for corrosion to occur. The higher corrosive level of air can react with metals causing degradation, wear and often lead to premature failure. This is especially prevalent in environments using forced air convection for cooling, such as data centers. The electronic circuitry is especially vulnerable to such corrosion and requires an environmentally controlled atmosphere with mild corrosiveness for long term reliability. The invention involves circulating the air in a closed loop and monitors and adjusts parameters of active filtration and purification to minimize corrosive agents. The system maintains a milder corrosive environment and better accommodates the use of “free cooling” from outside air for improved energy efficiency and lower carbon emissions. Air quality data is also collected and used to estimate equipment life time expectancy and substantiate warranty claims over exceeding manufacturers recommended environmental operating conditions.