Larry W Ho

US Patent:

20130181289, Jul 18, 2013

Filed:

Jan 16, 2012

Appl. No.:

13/351101

Inventors:

Marc Tarabbia - Pleasant Valley NY, US
James B. Gullette - Dresden, DE
Mahbub Rashed - Santa Clara CA, US
David S. Doman - Austin TX, US
Irene Y. Lin - Los Altos Hills CA, US
Ingolf Lorenz - Ottendorf-Okrilla, DE
Larry Ho - Cupertino CA, US
Chinh Nguyen - Austin TX, US
Jeff Kim - San Jose CA, US
Jongwook Kye - Pleasanton CA, US
Yuansheng Ma - Santa Clara CA, US
Yunfei Deng - Sunnyvale CA, US
Rod Augur - Hopewell Junction NY, US
Seung-Hyun Rhee - Fishkill NY, US
Jason E. Stephens - Beacon NY, US
Scott Johnson - Wappingers Falls NY, US
Subramani Kengeri - San Jose CA, US
Suresh Venkatesan - Danbury CT, US

Assignee:

GLOBALFOUNDRIES INC. - Grand Cayman

International Classification:

H01L 27/088
H01L 29/78

US Classification:

257341, 257335, 257E2706, 257E29256

Abstract:

A semiconductor device includes a semiconductor substrate having a diffusion region. A transistor is formed within the diffusion region. A power rail is disposed outside the diffusion region. A contact layer is disposed above the substrate and below the power rail. A via is disposed between the contact layer and the power rail to electrically connect the contact layer to the power rail. The contact layer includes a first length disposed outside the diffusion region and a second length extending from the first length into the diffusion region and electrically connected to the transistor.