Paul L Solomon

US Patent:

7161169, Jan 9, 2007

Filed:

Nov 3, 2004

Appl. No.:

10/980220

Inventors:

Victor Chan - New Paltz NY, US
Massimo V. Fischetti - Putnam Valley NY, US
John M. Hergenrother - Ridgefield CT, US
Meikei Leong - Wappingers Falls NY, US
Rajesh Rengarajan - Fishkill NY, US
Alexander Reznicek - Mount Kisco NY, US
Paul M. Solomon - Yorktown Heights NY, US
Chun-yung Sung - Poughkeepsie NY, US
Min Yang - Yorktown Heights NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 29/06
H01L 31/0328

US Classification:

257 18, 257 19, 257E29193

Abstract:

The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.

US Patent:

7314790, Jan 1, 2008

Filed:

Dec 18, 2006

Appl. No.:

11/612309

Inventors:

Victor Chan - New Paltz NY, US
Massimo V. Fischetti - Putnam Valley NY, US
John M. Hergenrother - Ridgefield CT, US
Meikei Ieong - Wappingers Falls NY, US
Rajesh Rengarajan - Fishkill NY, US
Alexander Reznicek - Mount Kisco NY, US
Paul M. Solomon - Yorktown Heights NY, US
Chun-yung Sung - Poughkeepsie NY, US
Min Yang - Yorktown Heights NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/336

US Classification:

438198, 438680, 257 18, 257E21102

Abstract:

The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.

US Patent:

7462525, Dec 9, 2008

Filed:

Oct 25, 2007

Appl. No.:

11/924024

Inventors:

Victor Chan - New Paltz NY, US
Massimo V. Fischetti - Putnam Valley NY, US
John M. Hergenrother - Ridgefield CT, US
Meikei Ieong - Wappingers Falls NY, US
Rajesh Rengarajan - Fishkill NY, US
Alexander Reznicek - Mount Kisco NY, US
Paul M. Solomon - Yorktown Heights NY, US
Chun-yung Sung - Poughkeepsie NY, US
Min Yang - Yorktown Heights NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/8234

US Classification:

438198, 438680, 257 18, 257 19, 257E21102, 257E29193

Abstract:

The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.

US Patent:

7943486, May 17, 2011

Filed:

May 6, 2008

Appl. No.:

12/115731

Inventors:

Victor Chan - New Paltz NY, US
Massimo V. Fischetti - Putnam Valley NY, US
John M. Hergenrother - Ridgefield CT, US
Meikei Ieong - Wappingers Falls NY, US
Rajesh Rengarajan - Fishkill NY, US
Alexander Reznicek - Mount Kisco NY, US
Paul M. Solomon - Yorktown Heights NY, US
Chun-yung Sung - Poughkeepsie NY, US
Min Yang - Yorktown Heights NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/30

US Classification:

438458

Abstract:

The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.

US Patent:

20080044987, Feb 21, 2008

Filed:

Oct 25, 2007

Appl. No.:

11/924015

Inventors:

Victor Chan - New Paltz NY, US
Massimo Fischetti - Putnam Valley NY, US
John Hergenrother - Ridgefield CT, US
Meikei Ieong - Wappingers Falls NY, US
Rajesh Rengarajan - Fishkill NY, US
Alexander Reznicek - Mount Kisco NY, US
Paul Solomon - Yorktown Heights NY, US
Chun-yung Sung - Poughkeepsie NY, US
Min Yang - Yorktown Heights NY, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

H01L 21/20

US Classification:

438492000, 257E21090

Abstract:

The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.

US Patent:

20130241007, Sep 19, 2013

Filed:

Mar 15, 2012

Appl. No.:

13/421276

Inventors:

Kisik Choi - Hopewell Junction NY, US
Christian Lavoie - Ossining NY, US
Paul M. Solomon - Yorktown Heights NY, US
Bin Yang - Ossining NY, US
Zhen Zhang - Ossining NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 29/78
H01L 21/283

US Classification:

257410, 438586, 257E2119, 257E29255

Abstract:

A method includes providing a semiconductor substrate having intentionally doped surface regions, the intentionally doped surface regions corresponding to locations of a source and a drain of a transistor; depositing a layer a band edge gate metal onto a gate insulator layer in a gate region of the transistor while simultaneously depositing the band edge gate metal onto the surface of the semiconductor substrate to be in contact with the intentionally doped surface regions; and depositing a layer of contact metal over the band edge gate metal in the gate region and in the locations of the source and the drain. The band edge gate metal in the source/drain regions reduces a Schottky barrier height of source/drain contacts of the transistor and serves to reduce contact resistance. A transistor fabricated in accordance with the method is also described.

US Patent:

20130241008, Sep 19, 2013

Filed:

Sep 12, 2012

Appl. No.:

13/611736

Inventors:

Kisik Choi - Hopewell Junction NY, US
Christian Lavoie - Ossining NY, US
Paul M. Solomon - Yorktown Heights NY, US
Bin Yang - Ossining NY, US
Zhen Zhang - Ossining NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 29/78

US Classification:

257410, 257E29255

Abstract:

A device includes a gate stack formed over a channel in a semiconductor substrate. The gate stack includes a layer of gate insulator material, a layer of gate metal overlying the layer of gate insulator material, and a layer of contact metal overlying the layer band edge gate metal. The device further includes source and drain contacts adjacent to the channel. The source and drain contacts each include a layer of the gate metal that overlies and is in direct electrical contact with a doped region of the semiconductor substrate, and a layer of contact metal that overlies the layer of gate metal.

US Patent:

20200050929, Feb 13, 2020

Filed:

Aug 10, 2018

Appl. No.:

16/100673

Inventors:

- Armonk NY, US
Zhibin Ren - Hopewell Junction NY, US
SEYOUNG KIM - Korea, KR
Paul Michael Solomon - Westchester NY, US

International Classification:

G06N 3/063
G06N 3/04

Abstract:

Method, systems, crosspoint arrays, and systems for tuning a neural network. A crosspoint array includes: a set of conductive rows, a set of conductive columns intersecting the set of conductive rows to form a plurality of crosspoints, a circuit element coupled to each of the plurality of crosspoints configured to store a weight of the neural network, a voltage source associated with each conductive row, a first integrator attached at the end of at least one of the conductive column, and a first variable resistor attached to the integrator and the end of the at least one conductive column.