Paul M Sonntag

US Patent:

6344698, Feb 5, 2002

Filed:

Feb 22, 1999

Appl. No.:

09/253864

Inventors:

Roger Lawrence Barr - Milton VT
Robert Truman Froebel - Fairfax VT
Paul Sonntag - Colchester VT

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 23544

US Classification:

257797

Abstract:

Robust alignment marks which are substantially resistant to degradation caused by semiconductor device fabrication steps are disclosed. The new alignment marks use a series of geometrical shapes that are staggered in respect to each other to achieve more left and right edges providing a checkerboard alignment mark. The geometrical shapes have a size that is selected so as to be within the resolving capability of the exposure tool, yet smaller than the resolving capability of the alignment system. The small staggered geometrical shapes provide a more symmetrical signal which is more resistant to variability in prior processing steps than the standard mark design.

US Patent:

6513796, Feb 4, 2003

Filed:

Feb 23, 2001

Appl. No.:

09/681210

Inventors:

Robert K. Leidy - Burlington VT
Paul D. Sonntag - Colchester VT

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

B25B 1100

US Classification:

267 21, 269266, 269 20, 269903, 451388

Abstract:

A vacuum chuck/insert assembly ( ) for firmly supporting a semiconductor wafer ( ) during wafer processing. The vacuum chuck comprises a chuck ( ) and a removable insert ( ). The chuck includes a base ( ) and a plurality of spacers ( ) for holding the insert in spaced relationship to the base of the chuck. The chuck further includes first and second vacuum seals ( ) and vacuum ports ( ) extending through the base of the chuck. The insert includes a base ( ) and a plurality of spacers ( ) for holding the wafer in spaced relationship to the base of the insert. The insert further includes a vacuum seal ( ) and vacuum ports ( ) extending through the base of the insert. During operation, vacuum applied to the vacuum chuck/insert assembly holds the insert firmly in contact with the chuck and the wafer firmly in contact with the insert.

US Patent:

6528219, Mar 4, 2003

Filed:

Jul 27, 2000

Appl. No.:

09/627205

Inventors:

Edward W. Conrad - Jeffersonville VT
Paul D. Sonntag - Colchester VT
Arthur C. Winslow - Essex Junction VT

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G03F 900

US Classification:

430 22, 430 30

Abstract:

Photolithography tools have alignment systems for aligning a level to be printed with a level already on the wafer. Commonly a photolithography tool has several alignment systems Also, wafers may have several alignment marks, and the various alignment systems may be capable of reading several of the alignment marks. The present invention provides a method of selecting the alignment system-alignment mark combination that gives the most accurate alignment to a previous level. The inventors found that residual errors provide a metric by which to evaluate alignment system-alignment mark combinations. The combination with the least residual error is selected. Alternatively data for actual overlay measurements is compared with alignment data for each alignment system-alignment mark combination, and the combination that has the best correlation to the overlay data is selected.

US Patent:

7005221, Feb 28, 2006

Filed:

Aug 29, 2002

Appl. No.:

10/064920

Inventors:

Robert T. Froebel - Fairfax VT, US
Paul D. Sonntag - Colchester VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G03F 7/00

US Classification:

430 30, 430322

Abstract:

A method, exposure apparatus, and printed wafer such that a design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The exposure apparatus comprises a lens, a reticle that includes a pattern, and a reticle blind. The reticle blind blocks a first portion of light that is passed through the exposure apparatus. A transparent portion of the reticle transmits a remaining portion of the light. The lens focuses the remaining portion of the light onto the wafer such that an image of a portion of the pattern is printed as the design within the peripheral portion of the wafer. The printed design is a function of where the reticle blind is positioned relative to the pattern.

US Patent:

7456966, Nov 25, 2008

Filed:

Jan 19, 2004

Appl. No.:

10/707864

Inventors:

Robert T. Froebel - Fairfax VT, US
Paul D. Sonntag - Colchester VT, US
Peter J. Sullivan - Fairfax VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01B 11/00

US Classification:

356399

Abstract:

The present invention is a system and method for use with alignment marks and search algorithms of diffraction pattern detection tools. The system and method of the invention significantly increases the capture range of diffraction pattern detection methods and enable more efficient operation of tools employing such detection methods.

US Patent:

7656505, Feb 2, 2010

Filed:

Jan 6, 2006

Appl. No.:

11/326968

Inventors:

Robert T. Froebel - Fairfax VT, US
Paul D. Sonntag - Colchester VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G03B 27/72

US Classification:

355 71

Abstract:

An exposure apparatus and printed wafer such that a design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The exposure apparatus comprises a lens, a reticle that includes a pattern, and a reticle blind. The reticle blind blocks a first portion of light that is passed through the exposure apparatus. A transparent portion of the reticle transmits a remaining portion of the light. The lens focuses the remaining portion of the light onto the wafer such that an image of a portion of the pattern is printed as the design within the peripheral portion of the wafer. The printed design is a function of where the reticle blind is positioned relative to the pattern.

US Patent:

7687210, Mar 30, 2010

Filed:

Jun 25, 2007

Appl. No.:

11/767633

Inventors:

Robert K. Leidy - Burlington VT, US
Paul D. Sonntag - Colchester VT, US
Peter J. Sullivan - Fairfax VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G03F 9/00
G03C 5/00

US Classification:

430 22, 430 5, 430 30, 430296, 430942

Abstract:

A method for manufacturing a stitched space in a semiconductor circuit implements a photolithographic process for printing one or more image fields on a wafer surface, each image field corresponding to a portion of a circuit or device and including a space that is to be stitched in adjacent image fields. The space to be stitched that is produced from an image field is overlapped onto the space to be stitched produced from the adjacent image field, however, the overlapped space from the adjacent image fields is intentionally misaligned. The stitched space is then subject to the double light exposure dose to print the stitched space, with the result that an overlay tolerance of the stitched space is improved.

US Patent:

8634063, Jan 21, 2014

Filed:

Dec 14, 2009

Appl. No.:

12/637048

Inventors:

Robert T. Froebel - Fairfax VT, US
Paul D. Sonntag - Colchester VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G03B 27/72

US Classification:

355 71

Abstract:

A printed wafer. A design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The design may be a copy of a portion of a pattern that exists on a reticle of an exposure apparatus. The pattern may includes pattern elements such that adjacent pattern elements are separated by a spacing of about a sum of a first design tolerance (based on how accurately a reticle blind can be positioned within the exposure apparatus) and a second design tolerance (based on how sharply an edge of the reticle blind can be focused on the wafer by a lens). The design may visible to a naked eye unaided with no portion of the printed design within the active portion of the wafer.