Richard R Halverson

US Patent:

40568091, Nov 1, 1977

Filed:

Apr 30, 1975

Appl. No.:

5/573303

Inventors:

John S. Hoerning - Minneapolis MN
Richard P. Halverson - Minneapolis MN
Darrell E. Nelson - Bloomington MN

Assignee:

Data Flo Corporation - Minneapolis MN

International Classification:

G06F 502
G06F 906

US Classification:

364200

Abstract:

Fast Table Lookup Apparatus For Reading Memory is disclosed for use in conjunction with a logic bus, a memory device, a microprocessor of the type which provides an output logic signal to the bus comprising the contents of an internal register and which includes apparatus for immediately reading the logic signals on the bus into the internal register of the microprocessor, including logic which is external to the microprocessor, for recognizing when the microprocessor provides such a logic signal output and for utilizing the register contents available to address a location within the memory device to cause the substitution of the contents of the memory location within the memory device, which conforms to the microprocessor internal register contents, for the contents of the microprocessor internal register on the bus, and all in sufficient time for the memory location contents to be read into the microprocessor as a part of the next input to the microprocessor.