Tuan A Do

US Patent:

6522189, Feb 18, 2003

Filed:

Oct 2, 2000

Appl. No.:

09/678482

Inventors:

Tuan P. Do - San Jose CA
Brian J. Campbell - Sunnyvale CA

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H03K 1762

US Classification:

327407, 327408, 327 57, 326115, 326119

Abstract:

A high-speed bank select multiplexer latch may be coupled to a pair of differential output nodes and configured to capture and retain an output on the pair of differential output nodes responsive to two or more pairs of differential data inputs being active. A first subcircuit including a first N-channel transistor and a second N-channel transistor is configured to receive at least a first input signal and a second input signal and to drive a first output on a first output node responsive to either of the first input signal or the second input signal being active. Additionally, a second subcircuit including a third N-channel transistor and a fourth N-channel transistor is configured to receive at least a third input signal and a fourth input signal and to drive a second output on a second output node responsive to either of the third input signal or the fourth input signal being active. A latching circuit including a first inverter and a second inverter is coupled to the first output node and the second output node and configured to retain the first output on the first output node and the second output on the second output node. A charging circuit is contemplated and includes at least a first NOR gate, a second NOR gate, and first and second P-channel transistors.

US Patent:

6630856, Oct 7, 2003

Filed:

Dec 6, 2002

Appl. No.:

10/313209

Inventors:

Tuan P. Do - San Jose CA
Brian J. Campbell - Sunnyvale CA

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H03K 1762

US Classification:

327407, 327408

Abstract:

A high-speed bank select multiplexer latch may be coupled to a pair of differential output nodes and configured to capture and retain an output on the pair of differential output nodes responsive to two or more pairs of differential data inputs being active. A first subcircuit including a first N-channel transistor and a second N-channel transistor is configured to receive at least a first input signal and a second input signal and to drive a first output on a first output node responsive to either of the first input signal or the second input signal being active. Additionally, a second subcircuit including a third N-channel transistor and a fourth N-channel transistor is configured to receive at least a third input signal and a fourth input signal and to drive a second output on a second output node responsive to either of the third input signal or the fourth input signal being active. A latching circuit including a first inverter and a second inverter is coupled to the first output node and the second output node and configured to retain the first output on the first output node and the second output on the second output node. A charging circuit is contemplated and includes at least a first NOR gate, a second NOR gate, and first and second P-channel transistors.

US Patent:

6674671, Jan 6, 2004

Filed:

Aug 14, 2002

Appl. No.:

10/218348

Inventors:

Brian J. Campbell - Sunnyvale CA
Tuan P. Do - San Jose CA

Assignee:

Broadcom Corp. - Irvine CA

International Classification:

G11C 700

US Classification:

36518905, 36518902, 326 86, 326 87, 327108

Abstract:

An apparatus may include at least a first transistor, a second transistor, and a circuit. The first transistor has a first control terminal coupled to receive a first dynamic data signal, and is coupled to a first node. The first transistor drives a first state on the first node responsive to an assertion of the first dynamic data signal. The second transistor is coupled to the first node and has a second control terminal. The second transistor is drives a second state on the first node responsive to a signal on the second control terminal. The circuit is coupled to generate the signal on the second control terminal and is coupled to receive a second dynamic data signal. The second dynamic data signal is a complement of the first dynamic data signal, wherein the circuit is activates the second transistor responsive to an assertion of the second dynamic data signal.

US Patent:

6859402, Feb 22, 2005

Filed:

Nov 17, 2003

Appl. No.:

10/715311

Inventors:

Brian J. Campbell - Sunnyvale CA, US
Tuan P. Do - San Jose CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

G11C007/00

US Classification:

36518905, 36518902, 326 86, 326 87, 327108

Abstract:

An apparatus may include at least a first transistor, a second transistor, and a circuit. The first transistor has a first control terminal coupled to receive a first dynamic data signal, and is coupled to a first node. The first transistor drives a first state on the first node responsive to an assertion of the first dynamic data signal. The second transistor is coupled to the first node and has a second control terminal. The second transistor is drives a second state on the first node responsive to a signal on the second control terminal. The circuit is coupled to generate the signal on the second control terminal and is coupled to receive a second dynamic data signal. The second dynamic data signal is a complement of the first dynamic data signal, wherein the circuit is activates the second transistor responsive to an assertion of the second dynamic data signal.

US Patent:

8154419, Apr 10, 2012

Filed:

Dec 14, 2007

Appl. No.:

11/956839

Inventors:

Rory Daussin - Spring TX, US
Mark Adams - Duncan OK, US
Andy Knight - Magnolia TX, US
Tuan Do - Missouri City TX, US
Brett Bibby - Houston TX, US
Matthew Oehler - Katy TX, US

Assignee:

Halliburton Energy Services Inc. - Duncan OK

International Classification:

G01V 3/00

US Classification:

3408531

Abstract:

A method of conducting a well treatment service job. The method comprises assembling an oilfield communication network. The oilfield communication network comprises a plurality of mobile terminals distributed across a plurality of well sites and a plurality of base transceiver stations. Some of the mobile terminals are coupled to each other in wireless communication by the base transceiver stations. The method further comprises preparing a well for the well treatment service job, performing one or more well treatment steps, collecting one or more data parameters associated with the well treatment service job, and communicating the one or more data parameters from at least a first one of the mobile terminals via the oilfield communication network.

US Patent:

58595520, Jan 12, 1999

Filed:

Aug 1, 1997

Appl. No.:

8/904743

Inventors:

Tuan P. Do - San Jose CA
Casimiro A. Stascausky - Fremont CA

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

H03H 1126

US Classification:

327170

Abstract:

A slew rate control circuit for an output circuit of an integrated circuit includes an input node for obtaining an input signal and an output node for providing an output signal. A first stage of the control circuit includes at least one transistor having a control terminal and first and second main terminals. The control terminals of each at least one transistor are connected together to the input node. The first main terminal of each at least one transistor are connected to a voltage rail. The second main terminal of each at least one transistor is connected to the output node through its own individual resistor. One or more subsequent stages of the control circuit each contain at least one transistor having a control terminal and first and second main terminals. The control terminals of each at least one transistor in each one or more subsequent stages of the control circuit are connected together to a control node driven from the control terminals of the preceding stage through at least one inverter. The first main terminal of each at least one transistor are connected to a voltage rail.