Victor J Cataldo

US Patent:

51827824, Jan 26, 1993

Filed:

Jan 7, 1992

Appl. No.:

7/817570

Inventors:

Marvin Tabasky - Peabody MA
Victor Cataldo - Wilmington MA
Thomas W. Fitzgerald - Framingham MA
Jagannath Chirravuri - Medfield MA
Craig A. Armiento - Acton MA
Paul O. Haugsjaa - Acton MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

G02B 642

US Classification:

385 89

Abstract:

A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.

US Patent:

54369967, Jul 25, 1995

Filed:

Sep 28, 1994

Appl. No.:

8/314572

Inventors:

Marvin Tabasky - Peabody MA
Victor Cataldo - Wilmington MA
Thomas W. Fitzgerald - Framingham MA
Jagannath Chirravuri - Medfield MA
Craig A. Armiento - Acton MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

G02B 600
B44C 122

US Classification:

385 89

Abstract:

A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal struutures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.

US Patent:

50213636, Jun 4, 1991

Filed:

Sep 7, 1989

Appl. No.:

7/404237

Inventors:

Harry F. Lockwood - Waban MA
Margaret B. Stern - Sudbury MA
Marvin Tabasky - Peabody MA
Victor Cataldo - Wilmington MA

Assignee:

Laboratories Incorporated - Waltham MA

International Classification:

H01L 2144

US Classification:

437200

Abstract:

Method of forming conductive members on a substrate of GaAs. Silicon is placed on the substrate surface in the desired pattern of the conductive members. The substrate is exposed to a gaseous atmosphere containing WF. sub. 6. WF. sub. 6 is reduced by the silicon causing tungsten to selectively deposit on the silicon but not on the exposed GaAs. The substrate is given a rapid thermal annealing treatment which causes the silicon-tungsten elements to form conductive members having a silicon rich layer at the bottom, an intermediate tungsten silicide layer, and a tungsten rich layer at the top. The conductive members form ohmic contacts with underlying heavily doped GaAs and rectifying Schottky barrier contacts with underlying lightly doped GaAs.

US Patent:

52680665, Dec 7, 1993

Filed:

Dec 30, 1992

Appl. No.:

7/999513

Inventors:

Marvin Tabasky - Peabody MA
Victor Cataldo - Wilmington MA
Thomas W. Fitzgerald - Framingham MA
Jagannath Chirravuri - Medfield MA
Craig A. Armiento - Acton MA
Paul O. Haugsjaa - Acton MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

H01L 21306
B44C 122
C03C 1500
C03C 2506

US Classification:

156633

Abstract:

A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.